Talk as presented plus example source for MSP432 blinky light demo

example-source/msp432p401r/src/dio/p10iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P10IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P10IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P10IVR {
+    #[doc = "No interrupt pending"]
+    P10IV_0,
+    #[doc = "Interrupt Source: Port 10.0 interrupt; Interrupt Flag: P10IFG0; Interrupt Priority: Highest"]
+    P10IV_2,
+    #[doc = "Interrupt Source: Port 10.1 interrupt; Interrupt Flag: P10IFG1"]
+    P10IV_4,
+    #[doc = "Interrupt Source: Port 10.2 interrupt; Interrupt Flag: P10IFG2"]
+    P10IV_6,
+    #[doc = "Interrupt Source: Port 10.3 interrupt; Interrupt Flag: P10IFG3"]
+    P10IV_8,
+    #[doc = "Interrupt Source: Port 10.4 interrupt; Interrupt Flag: P10IFG4"]
+    P10IV_10,
+    #[doc = "Interrupt Source: Port 10.5 interrupt; Interrupt Flag: P10IFG5"]
+    P10IV_12,
+    #[doc = "Interrupt Source: Port 10.6 interrupt; Interrupt Flag: P10IFG6"]
+    P10IV_14,
+    #[doc = "Interrupt Source: Port 10.7 interrupt; Interrupt Flag: P10IFG7; Interrupt Priority: Lowest"]
+    P10IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P10IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P10IVR::P10IV_0 => 0,
+            P10IVR::P10IV_2 => 2,
+            P10IVR::P10IV_4 => 4,
+            P10IVR::P10IV_6 => 6,
+            P10IVR::P10IV_8 => 8,
+            P10IVR::P10IV_10 => 10,
+            P10IVR::P10IV_12 => 12,
+            P10IVR::P10IV_14 => 14,
+            P10IVR::P10IV_16 => 16,
+            P10IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P10IVR {
+        match value {
+            0 => P10IVR::P10IV_0,
+            2 => P10IVR::P10IV_2,
+            4 => P10IVR::P10IV_4,
+            6 => P10IVR::P10IV_6,
+            8 => P10IVR::P10IV_8,
+            10 => P10IVR::P10IV_10,
+            12 => P10IVR::P10IV_12,
+            14 => P10IVR::P10IV_14,
+            16 => P10IVR::P10IV_16,
+            i => P10IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P10IV_0`"]
+    #[inline]
+    pub fn is_p10iv_0(&self) -> bool {
+        *self == P10IVR::P10IV_0
+    }
+    #[doc = "Checks if the value of the field is `P10IV_2`"]
+    #[inline]
+    pub fn is_p10iv_2(&self) -> bool {
+        *self == P10IVR::P10IV_2
+    }
+    #[doc = "Checks if the value of the field is `P10IV_4`"]
+    #[inline]
+    pub fn is_p10iv_4(&self) -> bool {
+        *self == P10IVR::P10IV_4
+    }
+    #[doc = "Checks if the value of the field is `P10IV_6`"]
+    #[inline]
+    pub fn is_p10iv_6(&self) -> bool {
+        *self == P10IVR::P10IV_6
+    }
+    #[doc = "Checks if the value of the field is `P10IV_8`"]
+    #[inline]
+    pub fn is_p10iv_8(&self) -> bool {
+        *self == P10IVR::P10IV_8
+    }
+    #[doc = "Checks if the value of the field is `P10IV_10`"]
+    #[inline]
+    pub fn is_p10iv_10(&self) -> bool {
+        *self == P10IVR::P10IV_10
+    }
+    #[doc = "Checks if the value of the field is `P10IV_12`"]
+    #[inline]
+    pub fn is_p10iv_12(&self) -> bool {
+        *self == P10IVR::P10IV_12
+    }
+    #[doc = "Checks if the value of the field is `P10IV_14`"]
+    #[inline]
+    pub fn is_p10iv_14(&self) -> bool {
+        *self == P10IVR::P10IV_14
+    }
+    #[doc = "Checks if the value of the field is `P10IV_16`"]
+    #[inline]
+    pub fn is_p10iv_16(&self) -> bool {
+        *self == P10IVR::P10IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 10 interrupt vector value"]
+    #[inline]
+    pub fn p10iv(&self) -> P10IVR {
+        P10IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p1iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P1IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P1IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P1IVR {
+    #[doc = "No interrupt pending"]
+    P1IV_0,
+    #[doc = "Interrupt Source: Port 1.0 interrupt; Interrupt Flag: P1IFG0; Interrupt Priority: Highest"]
+    P1IV_2,
+    #[doc = "Interrupt Source: Port 1.1 interrupt; Interrupt Flag: P1IFG1"]
+    P1IV_4,
+    #[doc = "Interrupt Source: Port 1.2 interrupt; Interrupt Flag: P1IFG2"]
+    P1IV_6,
+    #[doc = "Interrupt Source: Port 1.3 interrupt; Interrupt Flag: P1IFG3"]
+    P1IV_8,
+    #[doc = "Interrupt Source: Port 1.4 interrupt; Interrupt Flag: P1IFG4"]
+    P1IV_10,
+    #[doc = "Interrupt Source: Port 1.5 interrupt; Interrupt Flag: P1IFG5"]
+    P1IV_12,
+    #[doc = "Interrupt Source: Port 1.6 interrupt; Interrupt Flag: P1IFG6"]
+    P1IV_14,
+    #[doc = "Interrupt Source: Port 1.7 interrupt; Interrupt Flag: P1IFG7; Interrupt Priority: Lowest"]
+    P1IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P1IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P1IVR::P1IV_0 => 0,
+            P1IVR::P1IV_2 => 2,
+            P1IVR::P1IV_4 => 4,
+            P1IVR::P1IV_6 => 6,
+            P1IVR::P1IV_8 => 8,
+            P1IVR::P1IV_10 => 10,
+            P1IVR::P1IV_12 => 12,
+            P1IVR::P1IV_14 => 14,
+            P1IVR::P1IV_16 => 16,
+            P1IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P1IVR {
+        match value {
+            0 => P1IVR::P1IV_0,
+            2 => P1IVR::P1IV_2,
+            4 => P1IVR::P1IV_4,
+            6 => P1IVR::P1IV_6,
+            8 => P1IVR::P1IV_8,
+            10 => P1IVR::P1IV_10,
+            12 => P1IVR::P1IV_12,
+            14 => P1IVR::P1IV_14,
+            16 => P1IVR::P1IV_16,
+            i => P1IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P1IV_0`"]
+    #[inline]
+    pub fn is_p1iv_0(&self) -> bool {
+        *self == P1IVR::P1IV_0
+    }
+    #[doc = "Checks if the value of the field is `P1IV_2`"]
+    #[inline]
+    pub fn is_p1iv_2(&self) -> bool {
+        *self == P1IVR::P1IV_2
+    }
+    #[doc = "Checks if the value of the field is `P1IV_4`"]
+    #[inline]
+    pub fn is_p1iv_4(&self) -> bool {
+        *self == P1IVR::P1IV_4
+    }
+    #[doc = "Checks if the value of the field is `P1IV_6`"]
+    #[inline]
+    pub fn is_p1iv_6(&self) -> bool {
+        *self == P1IVR::P1IV_6
+    }
+    #[doc = "Checks if the value of the field is `P1IV_8`"]
+    #[inline]
+    pub fn is_p1iv_8(&self) -> bool {
+        *self == P1IVR::P1IV_8
+    }
+    #[doc = "Checks if the value of the field is `P1IV_10`"]
+    #[inline]
+    pub fn is_p1iv_10(&self) -> bool {
+        *self == P1IVR::P1IV_10
+    }
+    #[doc = "Checks if the value of the field is `P1IV_12`"]
+    #[inline]
+    pub fn is_p1iv_12(&self) -> bool {
+        *self == P1IVR::P1IV_12
+    }
+    #[doc = "Checks if the value of the field is `P1IV_14`"]
+    #[inline]
+    pub fn is_p1iv_14(&self) -> bool {
+        *self == P1IVR::P1IV_14
+    }
+    #[doc = "Checks if the value of the field is `P1IV_16`"]
+    #[inline]
+    pub fn is_p1iv_16(&self) -> bool {
+        *self == P1IVR::P1IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 1 interrupt vector value"]
+    #[inline]
+    pub fn p1iv(&self) -> P1IVR {
+        P1IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p2iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P2IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P2IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P2IVR {
+    #[doc = "No interrupt pending"]
+    P2IV_0,
+    #[doc = "Interrupt Source: Port 2.0 interrupt; Interrupt Flag: P2IFG0; Interrupt Priority: Highest"]
+    P2IV_2,
+    #[doc = "Interrupt Source: Port 2.1 interrupt; Interrupt Flag: P2IFG1"]
+    P2IV_4,
+    #[doc = "Interrupt Source: Port 2.2 interrupt; Interrupt Flag: P2IFG2"]
+    P2IV_6,
+    #[doc = "Interrupt Source: Port 2.3 interrupt; Interrupt Flag: P2IFG3"]
+    P2IV_8,
+    #[doc = "Interrupt Source: Port 2.4 interrupt; Interrupt Flag: P2IFG4"]
+    P2IV_10,
+    #[doc = "Interrupt Source: Port 2.5 interrupt; Interrupt Flag: P2IFG5"]
+    P2IV_12,
+    #[doc = "Interrupt Source: Port 2.6 interrupt; Interrupt Flag: P2IFG6"]
+    P2IV_14,
+    #[doc = "Interrupt Source: Port 2.7 interrupt; Interrupt Flag: P2IFG7; Interrupt Priority: Lowest"]
+    P2IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P2IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P2IVR::P2IV_0 => 0,
+            P2IVR::P2IV_2 => 2,
+            P2IVR::P2IV_4 => 4,
+            P2IVR::P2IV_6 => 6,
+            P2IVR::P2IV_8 => 8,
+            P2IVR::P2IV_10 => 10,
+            P2IVR::P2IV_12 => 12,
+            P2IVR::P2IV_14 => 14,
+            P2IVR::P2IV_16 => 16,
+            P2IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P2IVR {
+        match value {
+            0 => P2IVR::P2IV_0,
+            2 => P2IVR::P2IV_2,
+            4 => P2IVR::P2IV_4,
+            6 => P2IVR::P2IV_6,
+            8 => P2IVR::P2IV_8,
+            10 => P2IVR::P2IV_10,
+            12 => P2IVR::P2IV_12,
+            14 => P2IVR::P2IV_14,
+            16 => P2IVR::P2IV_16,
+            i => P2IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P2IV_0`"]
+    #[inline]
+    pub fn is_p2iv_0(&self) -> bool {
+        *self == P2IVR::P2IV_0
+    }
+    #[doc = "Checks if the value of the field is `P2IV_2`"]
+    #[inline]
+    pub fn is_p2iv_2(&self) -> bool {
+        *self == P2IVR::P2IV_2
+    }
+    #[doc = "Checks if the value of the field is `P2IV_4`"]
+    #[inline]
+    pub fn is_p2iv_4(&self) -> bool {
+        *self == P2IVR::P2IV_4
+    }
+    #[doc = "Checks if the value of the field is `P2IV_6`"]
+    #[inline]
+    pub fn is_p2iv_6(&self) -> bool {
+        *self == P2IVR::P2IV_6
+    }
+    #[doc = "Checks if the value of the field is `P2IV_8`"]
+    #[inline]
+    pub fn is_p2iv_8(&self) -> bool {
+        *self == P2IVR::P2IV_8
+    }
+    #[doc = "Checks if the value of the field is `P2IV_10`"]
+    #[inline]
+    pub fn is_p2iv_10(&self) -> bool {
+        *self == P2IVR::P2IV_10
+    }
+    #[doc = "Checks if the value of the field is `P2IV_12`"]
+    #[inline]
+    pub fn is_p2iv_12(&self) -> bool {
+        *self == P2IVR::P2IV_12
+    }
+    #[doc = "Checks if the value of the field is `P2IV_14`"]
+    #[inline]
+    pub fn is_p2iv_14(&self) -> bool {
+        *self == P2IVR::P2IV_14
+    }
+    #[doc = "Checks if the value of the field is `P2IV_16`"]
+    #[inline]
+    pub fn is_p2iv_16(&self) -> bool {
+        *self == P2IVR::P2IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 2 interrupt vector value"]
+    #[inline]
+    pub fn p2iv(&self) -> P2IVR {
+        P2IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p3iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P3IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P3IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P3IVR {
+    #[doc = "No interrupt pending"]
+    P3IV_0,
+    #[doc = "Interrupt Source: Port 3.0 interrupt; Interrupt Flag: P3IFG0; Interrupt Priority: Highest"]
+    P3IV_2,
+    #[doc = "Interrupt Source: Port 3.1 interrupt; Interrupt Flag: P3IFG1"]
+    P3IV_4,
+    #[doc = "Interrupt Source: Port 3.2 interrupt; Interrupt Flag: P3IFG2"]
+    P3IV_6,
+    #[doc = "Interrupt Source: Port 3.3 interrupt; Interrupt Flag: P3IFG3"]
+    P3IV_8,
+    #[doc = "Interrupt Source: Port 3.4 interrupt; Interrupt Flag: P3IFG4"]
+    P3IV_10,
+    #[doc = "Interrupt Source: Port 3.5 interrupt; Interrupt Flag: P3IFG5"]
+    P3IV_12,
+    #[doc = "Interrupt Source: Port 3.6 interrupt; Interrupt Flag: P3IFG6"]
+    P3IV_14,
+    #[doc = "Interrupt Source: Port 3.7 interrupt; Interrupt Flag: P3IFG7; Interrupt Priority: Lowest"]
+    P3IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P3IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P3IVR::P3IV_0 => 0,
+            P3IVR::P3IV_2 => 2,
+            P3IVR::P3IV_4 => 4,
+            P3IVR::P3IV_6 => 6,
+            P3IVR::P3IV_8 => 8,
+            P3IVR::P3IV_10 => 10,
+            P3IVR::P3IV_12 => 12,
+            P3IVR::P3IV_14 => 14,
+            P3IVR::P3IV_16 => 16,
+            P3IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P3IVR {
+        match value {
+            0 => P3IVR::P3IV_0,
+            2 => P3IVR::P3IV_2,
+            4 => P3IVR::P3IV_4,
+            6 => P3IVR::P3IV_6,
+            8 => P3IVR::P3IV_8,
+            10 => P3IVR::P3IV_10,
+            12 => P3IVR::P3IV_12,
+            14 => P3IVR::P3IV_14,
+            16 => P3IVR::P3IV_16,
+            i => P3IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P3IV_0`"]
+    #[inline]
+    pub fn is_p3iv_0(&self) -> bool {
+        *self == P3IVR::P3IV_0
+    }
+    #[doc = "Checks if the value of the field is `P3IV_2`"]
+    #[inline]
+    pub fn is_p3iv_2(&self) -> bool {
+        *self == P3IVR::P3IV_2
+    }
+    #[doc = "Checks if the value of the field is `P3IV_4`"]
+    #[inline]
+    pub fn is_p3iv_4(&self) -> bool {
+        *self == P3IVR::P3IV_4
+    }
+    #[doc = "Checks if the value of the field is `P3IV_6`"]
+    #[inline]
+    pub fn is_p3iv_6(&self) -> bool {
+        *self == P3IVR::P3IV_6
+    }
+    #[doc = "Checks if the value of the field is `P3IV_8`"]
+    #[inline]
+    pub fn is_p3iv_8(&self) -> bool {
+        *self == P3IVR::P3IV_8
+    }
+    #[doc = "Checks if the value of the field is `P3IV_10`"]
+    #[inline]
+    pub fn is_p3iv_10(&self) -> bool {
+        *self == P3IVR::P3IV_10
+    }
+    #[doc = "Checks if the value of the field is `P3IV_12`"]
+    #[inline]
+    pub fn is_p3iv_12(&self) -> bool {
+        *self == P3IVR::P3IV_12
+    }
+    #[doc = "Checks if the value of the field is `P3IV_14`"]
+    #[inline]
+    pub fn is_p3iv_14(&self) -> bool {
+        *self == P3IVR::P3IV_14
+    }
+    #[doc = "Checks if the value of the field is `P3IV_16`"]
+    #[inline]
+    pub fn is_p3iv_16(&self) -> bool {
+        *self == P3IVR::P3IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 3 interrupt vector value"]
+    #[inline]
+    pub fn p3iv(&self) -> P3IVR {
+        P3IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p4iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P4IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P4IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P4IVR {
+    #[doc = "No interrupt pending"]
+    P4IV_0,
+    #[doc = "Interrupt Source: Port 4.0 interrupt; Interrupt Flag: P4IFG0; Interrupt Priority: Highest"]
+    P4IV_2,
+    #[doc = "Interrupt Source: Port 4.1 interrupt; Interrupt Flag: P4IFG1"]
+    P4IV_4,
+    #[doc = "Interrupt Source: Port 4.2 interrupt; Interrupt Flag: P4IFG2"]
+    P4IV_6,
+    #[doc = "Interrupt Source: Port 4.3 interrupt; Interrupt Flag: P4IFG3"]
+    P4IV_8,
+    #[doc = "Interrupt Source: Port 4.4 interrupt; Interrupt Flag: P4IFG4"]
+    P4IV_10,
+    #[doc = "Interrupt Source: Port 4.5 interrupt; Interrupt Flag: P4IFG5"]
+    P4IV_12,
+    #[doc = "Interrupt Source: Port 4.6 interrupt; Interrupt Flag: P4IFG6"]
+    P4IV_14,
+    #[doc = "Interrupt Source: Port 4.7 interrupt; Interrupt Flag: P4IFG7; Interrupt Priority: Lowest"]
+    P4IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P4IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P4IVR::P4IV_0 => 0,
+            P4IVR::P4IV_2 => 2,
+            P4IVR::P4IV_4 => 4,
+            P4IVR::P4IV_6 => 6,
+            P4IVR::P4IV_8 => 8,
+            P4IVR::P4IV_10 => 10,
+            P4IVR::P4IV_12 => 12,
+            P4IVR::P4IV_14 => 14,
+            P4IVR::P4IV_16 => 16,
+            P4IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P4IVR {
+        match value {
+            0 => P4IVR::P4IV_0,
+            2 => P4IVR::P4IV_2,
+            4 => P4IVR::P4IV_4,
+            6 => P4IVR::P4IV_6,
+            8 => P4IVR::P4IV_8,
+            10 => P4IVR::P4IV_10,
+            12 => P4IVR::P4IV_12,
+            14 => P4IVR::P4IV_14,
+            16 => P4IVR::P4IV_16,
+            i => P4IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P4IV_0`"]
+    #[inline]
+    pub fn is_p4iv_0(&self) -> bool {
+        *self == P4IVR::P4IV_0
+    }
+    #[doc = "Checks if the value of the field is `P4IV_2`"]
+    #[inline]
+    pub fn is_p4iv_2(&self) -> bool {
+        *self == P4IVR::P4IV_2
+    }
+    #[doc = "Checks if the value of the field is `P4IV_4`"]
+    #[inline]
+    pub fn is_p4iv_4(&self) -> bool {
+        *self == P4IVR::P4IV_4
+    }
+    #[doc = "Checks if the value of the field is `P4IV_6`"]
+    #[inline]
+    pub fn is_p4iv_6(&self) -> bool {
+        *self == P4IVR::P4IV_6
+    }
+    #[doc = "Checks if the value of the field is `P4IV_8`"]
+    #[inline]
+    pub fn is_p4iv_8(&self) -> bool {
+        *self == P4IVR::P4IV_8
+    }
+    #[doc = "Checks if the value of the field is `P4IV_10`"]
+    #[inline]
+    pub fn is_p4iv_10(&self) -> bool {
+        *self == P4IVR::P4IV_10
+    }
+    #[doc = "Checks if the value of the field is `P4IV_12`"]
+    #[inline]
+    pub fn is_p4iv_12(&self) -> bool {
+        *self == P4IVR::P4IV_12
+    }
+    #[doc = "Checks if the value of the field is `P4IV_14`"]
+    #[inline]
+    pub fn is_p4iv_14(&self) -> bool {
+        *self == P4IVR::P4IV_14
+    }
+    #[doc = "Checks if the value of the field is `P4IV_16`"]
+    #[inline]
+    pub fn is_p4iv_16(&self) -> bool {
+        *self == P4IVR::P4IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 4 interrupt vector value"]
+    #[inline]
+    pub fn p4iv(&self) -> P4IVR {
+        P4IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p5iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P5IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P5IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P5IVR {
+    #[doc = "No interrupt pending"]
+    P5IV_0,
+    #[doc = "Interrupt Source: Port 5.0 interrupt; Interrupt Flag: P5IFG0; Interrupt Priority: Highest"]
+    P5IV_2,
+    #[doc = "Interrupt Source: Port 5.1 interrupt; Interrupt Flag: P5IFG1"]
+    P5IV_4,
+    #[doc = "Interrupt Source: Port 5.2 interrupt; Interrupt Flag: P5IFG2"]
+    P5IV_6,
+    #[doc = "Interrupt Source: Port 5.3 interrupt; Interrupt Flag: P5IFG3"]
+    P5IV_8,
+    #[doc = "Interrupt Source: Port 5.4 interrupt; Interrupt Flag: P5IFG4"]
+    P5IV_10,
+    #[doc = "Interrupt Source: Port 5.5 interrupt; Interrupt Flag: P5IFG5"]
+    P5IV_12,
+    #[doc = "Interrupt Source: Port 5.6 interrupt; Interrupt Flag: P5IFG6"]
+    P5IV_14,
+    #[doc = "Interrupt Source: Port 5.7 interrupt; Interrupt Flag: P5IFG7; Interrupt Priority: Lowest"]
+    P5IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P5IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P5IVR::P5IV_0 => 0,
+            P5IVR::P5IV_2 => 2,
+            P5IVR::P5IV_4 => 4,
+            P5IVR::P5IV_6 => 6,
+            P5IVR::P5IV_8 => 8,
+            P5IVR::P5IV_10 => 10,
+            P5IVR::P5IV_12 => 12,
+            P5IVR::P5IV_14 => 14,
+            P5IVR::P5IV_16 => 16,
+            P5IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P5IVR {
+        match value {
+            0 => P5IVR::P5IV_0,
+            2 => P5IVR::P5IV_2,
+            4 => P5IVR::P5IV_4,
+            6 => P5IVR::P5IV_6,
+            8 => P5IVR::P5IV_8,
+            10 => P5IVR::P5IV_10,
+            12 => P5IVR::P5IV_12,
+            14 => P5IVR::P5IV_14,
+            16 => P5IVR::P5IV_16,
+            i => P5IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P5IV_0`"]
+    #[inline]
+    pub fn is_p5iv_0(&self) -> bool {
+        *self == P5IVR::P5IV_0
+    }
+    #[doc = "Checks if the value of the field is `P5IV_2`"]
+    #[inline]
+    pub fn is_p5iv_2(&self) -> bool {
+        *self == P5IVR::P5IV_2
+    }
+    #[doc = "Checks if the value of the field is `P5IV_4`"]
+    #[inline]
+    pub fn is_p5iv_4(&self) -> bool {
+        *self == P5IVR::P5IV_4
+    }
+    #[doc = "Checks if the value of the field is `P5IV_6`"]
+    #[inline]
+    pub fn is_p5iv_6(&self) -> bool {
+        *self == P5IVR::P5IV_6
+    }
+    #[doc = "Checks if the value of the field is `P5IV_8`"]
+    #[inline]
+    pub fn is_p5iv_8(&self) -> bool {
+        *self == P5IVR::P5IV_8
+    }
+    #[doc = "Checks if the value of the field is `P5IV_10`"]
+    #[inline]
+    pub fn is_p5iv_10(&self) -> bool {
+        *self == P5IVR::P5IV_10
+    }
+    #[doc = "Checks if the value of the field is `P5IV_12`"]
+    #[inline]
+    pub fn is_p5iv_12(&self) -> bool {
+        *self == P5IVR::P5IV_12
+    }
+    #[doc = "Checks if the value of the field is `P5IV_14`"]
+    #[inline]
+    pub fn is_p5iv_14(&self) -> bool {
+        *self == P5IVR::P5IV_14
+    }
+    #[doc = "Checks if the value of the field is `P5IV_16`"]
+    #[inline]
+    pub fn is_p5iv_16(&self) -> bool {
+        *self == P5IVR::P5IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 5 interrupt vector value"]
+    #[inline]
+    pub fn p5iv(&self) -> P5IVR {
+        P5IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p6iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P6IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P6IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P6IVR {
+    #[doc = "No interrupt pending"]
+    P6IV_0,
+    #[doc = "Interrupt Source: Port 6.0 interrupt; Interrupt Flag: P6IFG0; Interrupt Priority: Highest"]
+    P6IV_2,
+    #[doc = "Interrupt Source: Port 6.1 interrupt; Interrupt Flag: P6IFG1"]
+    P6IV_4,
+    #[doc = "Interrupt Source: Port 6.2 interrupt; Interrupt Flag: P6IFG2"]
+    P6IV_6,
+    #[doc = "Interrupt Source: Port 6.3 interrupt; Interrupt Flag: P6IFG3"]
+    P6IV_8,
+    #[doc = "Interrupt Source: Port 6.4 interrupt; Interrupt Flag: P6IFG4"]
+    P6IV_10,
+    #[doc = "Interrupt Source: Port 6.5 interrupt; Interrupt Flag: P6IFG5"]
+    P6IV_12,
+    #[doc = "Interrupt Source: Port 6.6 interrupt; Interrupt Flag: P6IFG6"]
+    P6IV_14,
+    #[doc = "Interrupt Source: Port 6.7 interrupt; Interrupt Flag: P6IFG7; Interrupt Priority: Lowest"]
+    P6IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P6IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P6IVR::P6IV_0 => 0,
+            P6IVR::P6IV_2 => 2,
+            P6IVR::P6IV_4 => 4,
+            P6IVR::P6IV_6 => 6,
+            P6IVR::P6IV_8 => 8,
+            P6IVR::P6IV_10 => 10,
+            P6IVR::P6IV_12 => 12,
+            P6IVR::P6IV_14 => 14,
+            P6IVR::P6IV_16 => 16,
+            P6IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P6IVR {
+        match value {
+            0 => P6IVR::P6IV_0,
+            2 => P6IVR::P6IV_2,
+            4 => P6IVR::P6IV_4,
+            6 => P6IVR::P6IV_6,
+            8 => P6IVR::P6IV_8,
+            10 => P6IVR::P6IV_10,
+            12 => P6IVR::P6IV_12,
+            14 => P6IVR::P6IV_14,
+            16 => P6IVR::P6IV_16,
+            i => P6IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P6IV_0`"]
+    #[inline]
+    pub fn is_p6iv_0(&self) -> bool {
+        *self == P6IVR::P6IV_0
+    }
+    #[doc = "Checks if the value of the field is `P6IV_2`"]
+    #[inline]
+    pub fn is_p6iv_2(&self) -> bool {
+        *self == P6IVR::P6IV_2
+    }
+    #[doc = "Checks if the value of the field is `P6IV_4`"]
+    #[inline]
+    pub fn is_p6iv_4(&self) -> bool {
+        *self == P6IVR::P6IV_4
+    }
+    #[doc = "Checks if the value of the field is `P6IV_6`"]
+    #[inline]
+    pub fn is_p6iv_6(&self) -> bool {
+        *self == P6IVR::P6IV_6
+    }
+    #[doc = "Checks if the value of the field is `P6IV_8`"]
+    #[inline]
+    pub fn is_p6iv_8(&self) -> bool {
+        *self == P6IVR::P6IV_8
+    }
+    #[doc = "Checks if the value of the field is `P6IV_10`"]
+    #[inline]
+    pub fn is_p6iv_10(&self) -> bool {
+        *self == P6IVR::P6IV_10
+    }
+    #[doc = "Checks if the value of the field is `P6IV_12`"]
+    #[inline]
+    pub fn is_p6iv_12(&self) -> bool {
+        *self == P6IVR::P6IV_12
+    }
+    #[doc = "Checks if the value of the field is `P6IV_14`"]
+    #[inline]
+    pub fn is_p6iv_14(&self) -> bool {
+        *self == P6IVR::P6IV_14
+    }
+    #[doc = "Checks if the value of the field is `P6IV_16`"]
+    #[inline]
+    pub fn is_p6iv_16(&self) -> bool {
+        *self == P6IVR::P6IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 6 interrupt vector value"]
+    #[inline]
+    pub fn p6iv(&self) -> P6IVR {
+        P6IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p7iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P7IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P7IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P7IVR {
+    #[doc = "No interrupt pending"]
+    P7IV_0,
+    #[doc = "Interrupt Source: Port 7.0 interrupt; Interrupt Flag: P7IFG0; Interrupt Priority: Highest"]
+    P7IV_2,
+    #[doc = "Interrupt Source: Port 7.1 interrupt; Interrupt Flag: P7IFG1"]
+    P7IV_4,
+    #[doc = "Interrupt Source: Port 7.2 interrupt; Interrupt Flag: P7IFG2"]
+    P7IV_6,
+    #[doc = "Interrupt Source: Port 7.3 interrupt; Interrupt Flag: P7IFG3"]
+    P7IV_8,
+    #[doc = "Interrupt Source: Port 7.4 interrupt; Interrupt Flag: P7IFG4"]
+    P7IV_10,
+    #[doc = "Interrupt Source: Port 7.5 interrupt; Interrupt Flag: P7IFG5"]
+    P7IV_12,
+    #[doc = "Interrupt Source: Port 7.6 interrupt; Interrupt Flag: P7IFG6"]
+    P7IV_14,
+    #[doc = "Interrupt Source: Port 7.7 interrupt; Interrupt Flag: P7IFG7; Interrupt Priority: Lowest"]
+    P7IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P7IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P7IVR::P7IV_0 => 0,
+            P7IVR::P7IV_2 => 2,
+            P7IVR::P7IV_4 => 4,
+            P7IVR::P7IV_6 => 6,
+            P7IVR::P7IV_8 => 8,
+            P7IVR::P7IV_10 => 10,
+            P7IVR::P7IV_12 => 12,
+            P7IVR::P7IV_14 => 14,
+            P7IVR::P7IV_16 => 16,
+            P7IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P7IVR {
+        match value {
+            0 => P7IVR::P7IV_0,
+            2 => P7IVR::P7IV_2,
+            4 => P7IVR::P7IV_4,
+            6 => P7IVR::P7IV_6,
+            8 => P7IVR::P7IV_8,
+            10 => P7IVR::P7IV_10,
+            12 => P7IVR::P7IV_12,
+            14 => P7IVR::P7IV_14,
+            16 => P7IVR::P7IV_16,
+            i => P7IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P7IV_0`"]
+    #[inline]
+    pub fn is_p7iv_0(&self) -> bool {
+        *self == P7IVR::P7IV_0
+    }
+    #[doc = "Checks if the value of the field is `P7IV_2`"]
+    #[inline]
+    pub fn is_p7iv_2(&self) -> bool {
+        *self == P7IVR::P7IV_2
+    }
+    #[doc = "Checks if the value of the field is `P7IV_4`"]
+    #[inline]
+    pub fn is_p7iv_4(&self) -> bool {
+        *self == P7IVR::P7IV_4
+    }
+    #[doc = "Checks if the value of the field is `P7IV_6`"]
+    #[inline]
+    pub fn is_p7iv_6(&self) -> bool {
+        *self == P7IVR::P7IV_6
+    }
+    #[doc = "Checks if the value of the field is `P7IV_8`"]
+    #[inline]
+    pub fn is_p7iv_8(&self) -> bool {
+        *self == P7IVR::P7IV_8
+    }
+    #[doc = "Checks if the value of the field is `P7IV_10`"]
+    #[inline]
+    pub fn is_p7iv_10(&self) -> bool {
+        *self == P7IVR::P7IV_10
+    }
+    #[doc = "Checks if the value of the field is `P7IV_12`"]
+    #[inline]
+    pub fn is_p7iv_12(&self) -> bool {
+        *self == P7IVR::P7IV_12
+    }
+    #[doc = "Checks if the value of the field is `P7IV_14`"]
+    #[inline]
+    pub fn is_p7iv_14(&self) -> bool {
+        *self == P7IVR::P7IV_14
+    }
+    #[doc = "Checks if the value of the field is `P7IV_16`"]
+    #[inline]
+    pub fn is_p7iv_16(&self) -> bool {
+        *self == P7IVR::P7IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 7 interrupt vector value"]
+    #[inline]
+    pub fn p7iv(&self) -> P7IVR {
+        P7IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p8iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P8IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P8IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P8IVR {
+    #[doc = "No interrupt pending"]
+    P8IV_0,
+    #[doc = "Interrupt Source: Port 8.0 interrupt; Interrupt Flag: P8IFG0; Interrupt Priority: Highest"]
+    P8IV_2,
+    #[doc = "Interrupt Source: Port 8.1 interrupt; Interrupt Flag: P8IFG1"]
+    P8IV_4,
+    #[doc = "Interrupt Source: Port 8.2 interrupt; Interrupt Flag: P8IFG2"]
+    P8IV_6,
+    #[doc = "Interrupt Source: Port 8.3 interrupt; Interrupt Flag: P8IFG3"]
+    P8IV_8,
+    #[doc = "Interrupt Source: Port 8.4 interrupt; Interrupt Flag: P8IFG4"]
+    P8IV_10,
+    #[doc = "Interrupt Source: Port 8.5 interrupt; Interrupt Flag: P8IFG5"]
+    P8IV_12,
+    #[doc = "Interrupt Source: Port 8.6 interrupt; Interrupt Flag: P8IFG6"]
+    P8IV_14,
+    #[doc = "Interrupt Source: Port 8.7 interrupt; Interrupt Flag: P8IFG7; Interrupt Priority: Lowest"]
+    P8IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P8IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P8IVR::P8IV_0 => 0,
+            P8IVR::P8IV_2 => 2,
+            P8IVR::P8IV_4 => 4,
+            P8IVR::P8IV_6 => 6,
+            P8IVR::P8IV_8 => 8,
+            P8IVR::P8IV_10 => 10,
+            P8IVR::P8IV_12 => 12,
+            P8IVR::P8IV_14 => 14,
+            P8IVR::P8IV_16 => 16,
+            P8IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P8IVR {
+        match value {
+            0 => P8IVR::P8IV_0,
+            2 => P8IVR::P8IV_2,
+            4 => P8IVR::P8IV_4,
+            6 => P8IVR::P8IV_6,
+            8 => P8IVR::P8IV_8,
+            10 => P8IVR::P8IV_10,
+            12 => P8IVR::P8IV_12,
+            14 => P8IVR::P8IV_14,
+            16 => P8IVR::P8IV_16,
+            i => P8IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P8IV_0`"]
+    #[inline]
+    pub fn is_p8iv_0(&self) -> bool {
+        *self == P8IVR::P8IV_0
+    }
+    #[doc = "Checks if the value of the field is `P8IV_2`"]
+    #[inline]
+    pub fn is_p8iv_2(&self) -> bool {
+        *self == P8IVR::P8IV_2
+    }
+    #[doc = "Checks if the value of the field is `P8IV_4`"]
+    #[inline]
+    pub fn is_p8iv_4(&self) -> bool {
+        *self == P8IVR::P8IV_4
+    }
+    #[doc = "Checks if the value of the field is `P8IV_6`"]
+    #[inline]
+    pub fn is_p8iv_6(&self) -> bool {
+        *self == P8IVR::P8IV_6
+    }
+    #[doc = "Checks if the value of the field is `P8IV_8`"]
+    #[inline]
+    pub fn is_p8iv_8(&self) -> bool {
+        *self == P8IVR::P8IV_8
+    }
+    #[doc = "Checks if the value of the field is `P8IV_10`"]
+    #[inline]
+    pub fn is_p8iv_10(&self) -> bool {
+        *self == P8IVR::P8IV_10
+    }
+    #[doc = "Checks if the value of the field is `P8IV_12`"]
+    #[inline]
+    pub fn is_p8iv_12(&self) -> bool {
+        *self == P8IVR::P8IV_12
+    }
+    #[doc = "Checks if the value of the field is `P8IV_14`"]
+    #[inline]
+    pub fn is_p8iv_14(&self) -> bool {
+        *self == P8IVR::P8IV_14
+    }
+    #[doc = "Checks if the value of the field is `P8IV_16`"]
+    #[inline]
+    pub fn is_p8iv_16(&self) -> bool {
+        *self == P8IVR::P8IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 8 interrupt vector value"]
+    #[inline]
+    pub fn p8iv(&self) -> P8IVR {
+        P8IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/p9iv.rs

@@ -0,0 +1,133 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::P9IV {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = "Possible values of the field `P9IV`"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum P9IVR {
+    #[doc = "No interrupt pending"]
+    P9IV_0,
+    #[doc = "Interrupt Source: Port 9.0 interrupt; Interrupt Flag: P9IFG0; Interrupt Priority: Highest"]
+    P9IV_2,
+    #[doc = "Interrupt Source: Port 9.1 interrupt; Interrupt Flag: P9IFG1"]
+    P9IV_4,
+    #[doc = "Interrupt Source: Port 9.2 interrupt; Interrupt Flag: P9IFG2"]
+    P9IV_6,
+    #[doc = "Interrupt Source: Port 9.3 interrupt; Interrupt Flag: P9IFG3"]
+    P9IV_8,
+    #[doc = "Interrupt Source: Port 9.4 interrupt; Interrupt Flag: P9IFG4"]
+    P9IV_10,
+    #[doc = "Interrupt Source: Port 9.5 interrupt; Interrupt Flag: P9IFG5"]
+    P9IV_12,
+    #[doc = "Interrupt Source: Port 9.6 interrupt; Interrupt Flag: P9IFG6"]
+    P9IV_14,
+    #[doc = "Interrupt Source: Port 9.7 interrupt; Interrupt Flag: P9IFG7; Interrupt Priority: Lowest"]
+    P9IV_16,
+    #[doc = r" Reserved"]
+    _Reserved(u8),
+}
+impl P9IVR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        match *self {
+            P9IVR::P9IV_0 => 0,
+            P9IVR::P9IV_2 => 2,
+            P9IVR::P9IV_4 => 4,
+            P9IVR::P9IV_6 => 6,
+            P9IVR::P9IV_8 => 8,
+            P9IVR::P9IV_10 => 10,
+            P9IVR::P9IV_12 => 12,
+            P9IVR::P9IV_14 => 14,
+            P9IVR::P9IV_16 => 16,
+            P9IVR::_Reserved(bits) => bits,
+        }
+    }
+    #[allow(missing_docs)]
+    #[doc(hidden)]
+    #[inline]
+    pub fn _from(value: u8) -> P9IVR {
+        match value {
+            0 => P9IVR::P9IV_0,
+            2 => P9IVR::P9IV_2,
+            4 => P9IVR::P9IV_4,
+            6 => P9IVR::P9IV_6,
+            8 => P9IVR::P9IV_8,
+            10 => P9IVR::P9IV_10,
+            12 => P9IVR::P9IV_12,
+            14 => P9IVR::P9IV_14,
+            16 => P9IVR::P9IV_16,
+            i => P9IVR::_Reserved(i),
+        }
+    }
+    #[doc = "Checks if the value of the field is `P9IV_0`"]
+    #[inline]
+    pub fn is_p9iv_0(&self) -> bool {
+        *self == P9IVR::P9IV_0
+    }
+    #[doc = "Checks if the value of the field is `P9IV_2`"]
+    #[inline]
+    pub fn is_p9iv_2(&self) -> bool {
+        *self == P9IVR::P9IV_2
+    }
+    #[doc = "Checks if the value of the field is `P9IV_4`"]
+    #[inline]
+    pub fn is_p9iv_4(&self) -> bool {
+        *self == P9IVR::P9IV_4
+    }
+    #[doc = "Checks if the value of the field is `P9IV_6`"]
+    #[inline]
+    pub fn is_p9iv_6(&self) -> bool {
+        *self == P9IVR::P9IV_6
+    }
+    #[doc = "Checks if the value of the field is `P9IV_8`"]
+    #[inline]
+    pub fn is_p9iv_8(&self) -> bool {
+        *self == P9IVR::P9IV_8
+    }
+    #[doc = "Checks if the value of the field is `P9IV_10`"]
+    #[inline]
+    pub fn is_p9iv_10(&self) -> bool {
+        *self == P9IVR::P9IV_10
+    }
+    #[doc = "Checks if the value of the field is `P9IV_12`"]
+    #[inline]
+    pub fn is_p9iv_12(&self) -> bool {
+        *self == P9IVR::P9IV_12
+    }
+    #[doc = "Checks if the value of the field is `P9IV_14`"]
+    #[inline]
+    pub fn is_p9iv_14(&self) -> bool {
+        *self == P9IVR::P9IV_14
+    }
+    #[doc = "Checks if the value of the field is `P9IV_16`"]
+    #[inline]
+    pub fn is_p9iv_16(&self) -> bool {
+        *self == P9IVR::P9IV_16
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:4 - Port 9 interrupt vector value"]
+    #[inline]
+    pub fn p9iv(&self) -> P9IVR {
+        P9IVR::_from({
+            const MASK: u8 = 31;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        })
+    }
+}

example-source/msp432p401r/src/dio/padir.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PADIR {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1DIRR {
+    bits: u8,
+}
+impl P1DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2DIRR {
+    bits: u8,
+}
+impl P2DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Direction"]
+    #[inline]
+    pub fn p1dir(&self) -> P1DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1DIRR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Direction"]
+    #[inline]
+    pub fn p2dir(&self) -> P2DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2DIRR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Direction"]
+    #[inline]
+    pub fn p1dir(&mut self) -> _P1DIRW {
+        _P1DIRW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Direction"]
+    #[inline]
+    pub fn p2dir(&mut self) -> _P2DIRW {
+        _P2DIRW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pads.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PADS {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1DSR {
+    bits: u8,
+}
+impl P1DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2DSR {
+    bits: u8,
+}
+impl P2DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Drive Strength"]
+    #[inline]
+    pub fn p1ds(&self) -> P1DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1DSR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Drive Strength"]
+    #[inline]
+    pub fn p2ds(&self) -> P2DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2DSR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Drive Strength"]
+    #[inline]
+    pub fn p1ds(&mut self) -> _P1DSW {
+        _P1DSW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Drive Strength"]
+    #[inline]
+    pub fn p2ds(&mut self) -> _P2DSW {
+        _P2DSW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/paie.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PAIE {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1IER {
+    bits: u8,
+}
+impl P1IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2IER {
+    bits: u8,
+}
+impl P2IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Interrupt Enable"]
+    #[inline]
+    pub fn p1ie(&self) -> P1IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1IER { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Interrupt Enable"]
+    #[inline]
+    pub fn p2ie(&self) -> P2IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2IER { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Interrupt Enable"]
+    #[inline]
+    pub fn p1ie(&mut self) -> _P1IEW {
+        _P1IEW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Interrupt Enable"]
+    #[inline]
+    pub fn p2ie(&mut self) -> _P2IEW {
+        _P2IEW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/paies.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PAIES {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1IESR {
+    bits: u8,
+}
+impl P1IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2IESR {
+    bits: u8,
+}
+impl P2IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Interrupt Edge Select"]
+    #[inline]
+    pub fn p1ies(&self) -> P1IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1IESR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Interrupt Edge Select"]
+    #[inline]
+    pub fn p2ies(&self) -> P2IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2IESR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Interrupt Edge Select"]
+    #[inline]
+    pub fn p1ies(&mut self) -> _P1IESW {
+        _P1IESW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Interrupt Edge Select"]
+    #[inline]
+    pub fn p2ies(&mut self) -> _P2IESW {
+        _P2IESW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/paifg.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PAIFG {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1IFGR {
+    bits: u8,
+}
+impl P1IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2IFGR {
+    bits: u8,
+}
+impl P2IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Interrupt Flag"]
+    #[inline]
+    pub fn p1ifg(&self) -> P1IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1IFGR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Interrupt Flag"]
+    #[inline]
+    pub fn p2ifg(&self) -> P2IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2IFGR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Interrupt Flag"]
+    #[inline]
+    pub fn p1ifg(&mut self) -> _P1IFGW {
+        _P1IFGW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Interrupt Flag"]
+    #[inline]
+    pub fn p2ifg(&mut self) -> _P2IFGW {
+        _P2IFGW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pain.rs

@@ -0,0 +1,62 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::PAIN {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1INR {
+    bits: u8,
+}
+impl P1INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2INR {
+    bits: u8,
+}
+impl P2INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Input"]
+    #[inline]
+    pub fn p1in(&self) -> P1INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1INR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Input"]
+    #[inline]
+    pub fn p2in(&self) -> P2INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2INR { bits }
+    }
+}

example-source/msp432p401r/src/dio/paout.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PAOUT {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2OUTR {
+    bits: u8,
+}
+impl P2OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1OUTR {
+    bits: u8,
+}
+impl P1OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 8:15 - Port 2 Output"]
+    #[inline]
+    pub fn p2out(&self) -> P2OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2OUTR { bits }
+    }
+    #[doc = "Bits 0:7 - Port 1 Output"]
+    #[inline]
+    pub fn p1out(&self) -> P1OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1OUTR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 8:15 - Port 2 Output"]
+    #[inline]
+    pub fn p2out(&mut self) -> _P2OUTW {
+        _P2OUTW { w: self }
+    }
+    #[doc = "Bits 0:7 - Port 1 Output"]
+    #[inline]
+    pub fn p1out(&mut self) -> _P1OUTW {
+        _P1OUTW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/paren.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PAREN {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1RENR {
+    bits: u8,
+}
+impl P1RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2RENR {
+    bits: u8,
+}
+impl P2RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Resistor Enable"]
+    #[inline]
+    pub fn p1ren(&self) -> P1RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1RENR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Resistor Enable"]
+    #[inline]
+    pub fn p2ren(&self) -> P2RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2RENR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Resistor Enable"]
+    #[inline]
+    pub fn p1ren(&mut self) -> _P1RENW {
+        _P1RENW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Resistor Enable"]
+    #[inline]
+    pub fn p2ren(&mut self) -> _P2RENW {
+        _P2RENW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pasel0.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PASEL0 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1SEL0R {
+    bits: u8,
+}
+impl P1SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2SEL0R {
+    bits: u8,
+}
+impl P2SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Select 0"]
+    #[inline]
+    pub fn p1sel0(&self) -> P1SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1SEL0R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Select 0"]
+    #[inline]
+    pub fn p2sel0(&self) -> P2SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2SEL0R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Select 0"]
+    #[inline]
+    pub fn p1sel0(&mut self) -> _P1SEL0W {
+        _P1SEL0W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Select 0"]
+    #[inline]
+    pub fn p2sel0(&mut self) -> _P2SEL0W {
+        _P2SEL0W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pasel1.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PASEL1 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1SEL1R {
+    bits: u8,
+}
+impl P1SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2SEL1R {
+    bits: u8,
+}
+impl P2SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Select 1"]
+    #[inline]
+    pub fn p1sel1(&self) -> P1SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1SEL1R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Select 1"]
+    #[inline]
+    pub fn p2sel1(&self) -> P2SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2SEL1R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Select 1"]
+    #[inline]
+    pub fn p1sel1(&mut self) -> _P1SEL1W {
+        _P1SEL1W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Select 1"]
+    #[inline]
+    pub fn p2sel1(&mut self) -> _P2SEL1W {
+        _P2SEL1W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/paselc.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PASELC {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P1SELCR {
+    bits: u8,
+}
+impl P1SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P2SELCR {
+    bits: u8,
+}
+impl P2SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P1SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P1SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P2SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P2SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 1 Complement Select"]
+    #[inline]
+    pub fn p1selc(&self) -> P1SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P1SELCR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 2 Complement Select"]
+    #[inline]
+    pub fn p2selc(&self) -> P2SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P2SELCR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 1 Complement Select"]
+    #[inline]
+    pub fn p1selc(&mut self) -> _P1SELCW {
+        _P1SELCW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 2 Complement Select"]
+    #[inline]
+    pub fn p2selc(&mut self) -> _P2SELCW {
+        _P2SELCW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbdir.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBDIR {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3DIRR {
+    bits: u8,
+}
+impl P3DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4DIRR {
+    bits: u8,
+}
+impl P4DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Direction"]
+    #[inline]
+    pub fn p3dir(&self) -> P3DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3DIRR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Direction"]
+    #[inline]
+    pub fn p4dir(&self) -> P4DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4DIRR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Direction"]
+    #[inline]
+    pub fn p3dir(&mut self) -> _P3DIRW {
+        _P3DIRW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Direction"]
+    #[inline]
+    pub fn p4dir(&mut self) -> _P4DIRW {
+        _P4DIRW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbds.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBDS {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3DSR {
+    bits: u8,
+}
+impl P3DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4DSR {
+    bits: u8,
+}
+impl P4DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Drive Strength"]
+    #[inline]
+    pub fn p3ds(&self) -> P3DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3DSR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Drive Strength"]
+    #[inline]
+    pub fn p4ds(&self) -> P4DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4DSR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Drive Strength"]
+    #[inline]
+    pub fn p3ds(&mut self) -> _P3DSW {
+        _P3DSW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Drive Strength"]
+    #[inline]
+    pub fn p4ds(&mut self) -> _P4DSW {
+        _P4DSW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbie.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBIE {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3IER {
+    bits: u8,
+}
+impl P3IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4IER {
+    bits: u8,
+}
+impl P4IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Interrupt Enable"]
+    #[inline]
+    pub fn p3ie(&self) -> P3IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3IER { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Interrupt Enable"]
+    #[inline]
+    pub fn p4ie(&self) -> P4IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4IER { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Interrupt Enable"]
+    #[inline]
+    pub fn p3ie(&mut self) -> _P3IEW {
+        _P3IEW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Interrupt Enable"]
+    #[inline]
+    pub fn p4ie(&mut self) -> _P4IEW {
+        _P4IEW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbies.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBIES {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3IESR {
+    bits: u8,
+}
+impl P3IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4IESR {
+    bits: u8,
+}
+impl P4IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Interrupt Edge Select"]
+    #[inline]
+    pub fn p3ies(&self) -> P3IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3IESR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Interrupt Edge Select"]
+    #[inline]
+    pub fn p4ies(&self) -> P4IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4IESR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Interrupt Edge Select"]
+    #[inline]
+    pub fn p3ies(&mut self) -> _P3IESW {
+        _P3IESW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Interrupt Edge Select"]
+    #[inline]
+    pub fn p4ies(&mut self) -> _P4IESW {
+        _P4IESW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbifg.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBIFG {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3IFGR {
+    bits: u8,
+}
+impl P3IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4IFGR {
+    bits: u8,
+}
+impl P4IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Interrupt Flag"]
+    #[inline]
+    pub fn p3ifg(&self) -> P3IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3IFGR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Interrupt Flag"]
+    #[inline]
+    pub fn p4ifg(&self) -> P4IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4IFGR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Interrupt Flag"]
+    #[inline]
+    pub fn p3ifg(&mut self) -> _P3IFGW {
+        _P3IFGW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Interrupt Flag"]
+    #[inline]
+    pub fn p4ifg(&mut self) -> _P4IFGW {
+        _P4IFGW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbin.rs

@@ -0,0 +1,62 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::PBIN {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3INR {
+    bits: u8,
+}
+impl P3INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4INR {
+    bits: u8,
+}
+impl P4INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Input"]
+    #[inline]
+    pub fn p3in(&self) -> P3INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3INR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Input"]
+    #[inline]
+    pub fn p4in(&self) -> P4INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4INR { bits }
+    }
+}

example-source/msp432p401r/src/dio/pbout.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBOUT {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3OUTR {
+    bits: u8,
+}
+impl P3OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4OUTR {
+    bits: u8,
+}
+impl P4OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Output"]
+    #[inline]
+    pub fn p3out(&self) -> P3OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3OUTR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Output"]
+    #[inline]
+    pub fn p4out(&self) -> P4OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4OUTR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Output"]
+    #[inline]
+    pub fn p3out(&mut self) -> _P3OUTW {
+        _P3OUTW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Output"]
+    #[inline]
+    pub fn p4out(&mut self) -> _P4OUTW {
+        _P4OUTW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbren.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBREN {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3RENR {
+    bits: u8,
+}
+impl P3RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4RENR {
+    bits: u8,
+}
+impl P4RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Resistor Enable"]
+    #[inline]
+    pub fn p3ren(&self) -> P3RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3RENR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Resistor Enable"]
+    #[inline]
+    pub fn p4ren(&self) -> P4RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4RENR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Resistor Enable"]
+    #[inline]
+    pub fn p3ren(&mut self) -> _P3RENW {
+        _P3RENW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Resistor Enable"]
+    #[inline]
+    pub fn p4ren(&mut self) -> _P4RENW {
+        _P4RENW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbsel0.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBSEL0 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4SEL0R {
+    bits: u8,
+}
+impl P4SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3SEL0R {
+    bits: u8,
+}
+impl P3SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 8:15 - Port 4 Select 0"]
+    #[inline]
+    pub fn p4sel0(&self) -> P4SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4SEL0R { bits }
+    }
+    #[doc = "Bits 0:7 - Port 3 Select 0"]
+    #[inline]
+    pub fn p3sel0(&self) -> P3SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3SEL0R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 8:15 - Port 4 Select 0"]
+    #[inline]
+    pub fn p4sel0(&mut self) -> _P4SEL0W {
+        _P4SEL0W { w: self }
+    }
+    #[doc = "Bits 0:7 - Port 3 Select 0"]
+    #[inline]
+    pub fn p3sel0(&mut self) -> _P3SEL0W {
+        _P3SEL0W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbsel1.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBSEL1 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3SEL1R {
+    bits: u8,
+}
+impl P3SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4SEL1R {
+    bits: u8,
+}
+impl P4SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Select 1"]
+    #[inline]
+    pub fn p3sel1(&self) -> P3SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3SEL1R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Select 1"]
+    #[inline]
+    pub fn p4sel1(&self) -> P4SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4SEL1R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Select 1"]
+    #[inline]
+    pub fn p3sel1(&mut self) -> _P3SEL1W {
+        _P3SEL1W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Select 1"]
+    #[inline]
+    pub fn p4sel1(&mut self) -> _P4SEL1W {
+        _P4SEL1W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pbselc.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PBSELC {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P3SELCR {
+    bits: u8,
+}
+impl P3SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P4SELCR {
+    bits: u8,
+}
+impl P4SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P3SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P3SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P4SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P4SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 3 Complement Select"]
+    #[inline]
+    pub fn p3selc(&self) -> P3SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P3SELCR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 4 Complement Select"]
+    #[inline]
+    pub fn p4selc(&self) -> P4SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P4SELCR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 3 Complement Select"]
+    #[inline]
+    pub fn p3selc(&mut self) -> _P3SELCW {
+        _P3SELCW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 4 Complement Select"]
+    #[inline]
+    pub fn p4selc(&mut self) -> _P4SELCW {
+        _P4SELCW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcdir.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCDIR {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5DIRR {
+    bits: u8,
+}
+impl P5DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6DIRR {
+    bits: u8,
+}
+impl P6DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Direction"]
+    #[inline]
+    pub fn p5dir(&self) -> P5DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5DIRR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Direction"]
+    #[inline]
+    pub fn p6dir(&self) -> P6DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6DIRR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Direction"]
+    #[inline]
+    pub fn p5dir(&mut self) -> _P5DIRW {
+        _P5DIRW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Direction"]
+    #[inline]
+    pub fn p6dir(&mut self) -> _P6DIRW {
+        _P6DIRW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcds.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCDS {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5DSR {
+    bits: u8,
+}
+impl P5DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6DSR {
+    bits: u8,
+}
+impl P6DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Drive Strength"]
+    #[inline]
+    pub fn p5ds(&self) -> P5DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5DSR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Drive Strength"]
+    #[inline]
+    pub fn p6ds(&self) -> P6DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6DSR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Drive Strength"]
+    #[inline]
+    pub fn p5ds(&mut self) -> _P5DSW {
+        _P5DSW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Drive Strength"]
+    #[inline]
+    pub fn p6ds(&mut self) -> _P6DSW {
+        _P6DSW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcie.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCIE {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5IER {
+    bits: u8,
+}
+impl P5IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6IER {
+    bits: u8,
+}
+impl P6IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Interrupt Enable"]
+    #[inline]
+    pub fn p5ie(&self) -> P5IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5IER { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Interrupt Enable"]
+    #[inline]
+    pub fn p6ie(&self) -> P6IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6IER { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Interrupt Enable"]
+    #[inline]
+    pub fn p5ie(&mut self) -> _P5IEW {
+        _P5IEW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Interrupt Enable"]
+    #[inline]
+    pub fn p6ie(&mut self) -> _P6IEW {
+        _P6IEW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcies.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCIES {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5IESR {
+    bits: u8,
+}
+impl P5IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6IESR {
+    bits: u8,
+}
+impl P6IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Interrupt Edge Select"]
+    #[inline]
+    pub fn p5ies(&self) -> P5IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5IESR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Interrupt Edge Select"]
+    #[inline]
+    pub fn p6ies(&self) -> P6IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6IESR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Interrupt Edge Select"]
+    #[inline]
+    pub fn p5ies(&mut self) -> _P5IESW {
+        _P5IESW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Interrupt Edge Select"]
+    #[inline]
+    pub fn p6ies(&mut self) -> _P6IESW {
+        _P6IESW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcifg.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCIFG {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5IFGR {
+    bits: u8,
+}
+impl P5IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6IFGR {
+    bits: u8,
+}
+impl P6IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Interrupt Flag"]
+    #[inline]
+    pub fn p5ifg(&self) -> P5IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5IFGR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Interrupt Flag"]
+    #[inline]
+    pub fn p6ifg(&self) -> P6IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6IFGR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Interrupt Flag"]
+    #[inline]
+    pub fn p5ifg(&mut self) -> _P5IFGW {
+        _P5IFGW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Interrupt Flag"]
+    #[inline]
+    pub fn p6ifg(&mut self) -> _P6IFGW {
+        _P6IFGW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcin.rs

@@ -0,0 +1,62 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::PCIN {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5INR {
+    bits: u8,
+}
+impl P5INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6INR {
+    bits: u8,
+}
+impl P6INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Input"]
+    #[inline]
+    pub fn p5in(&self) -> P5INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5INR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Input"]
+    #[inline]
+    pub fn p6in(&self) -> P6INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6INR { bits }
+    }
+}

example-source/msp432p401r/src/dio/pcout.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCOUT {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5OUTR {
+    bits: u8,
+}
+impl P5OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6OUTR {
+    bits: u8,
+}
+impl P6OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Output"]
+    #[inline]
+    pub fn p5out(&self) -> P5OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5OUTR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Output"]
+    #[inline]
+    pub fn p6out(&self) -> P6OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6OUTR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Output"]
+    #[inline]
+    pub fn p5out(&mut self) -> _P5OUTW {
+        _P5OUTW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Output"]
+    #[inline]
+    pub fn p6out(&mut self) -> _P6OUTW {
+        _P6OUTW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcren.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCREN {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5RENR {
+    bits: u8,
+}
+impl P5RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6RENR {
+    bits: u8,
+}
+impl P6RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Resistor Enable"]
+    #[inline]
+    pub fn p5ren(&self) -> P5RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5RENR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Resistor Enable"]
+    #[inline]
+    pub fn p6ren(&self) -> P6RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6RENR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Resistor Enable"]
+    #[inline]
+    pub fn p5ren(&mut self) -> _P5RENW {
+        _P5RENW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Resistor Enable"]
+    #[inline]
+    pub fn p6ren(&mut self) -> _P6RENW {
+        _P6RENW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcsel0.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCSEL0 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5SEL0R {
+    bits: u8,
+}
+impl P5SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6SEL0R {
+    bits: u8,
+}
+impl P6SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Select 0"]
+    #[inline]
+    pub fn p5sel0(&self) -> P5SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5SEL0R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Select 0"]
+    #[inline]
+    pub fn p6sel0(&self) -> P6SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6SEL0R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Select 0"]
+    #[inline]
+    pub fn p5sel0(&mut self) -> _P5SEL0W {
+        _P5SEL0W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Select 0"]
+    #[inline]
+    pub fn p6sel0(&mut self) -> _P6SEL0W {
+        _P6SEL0W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcsel1.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCSEL1 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5SEL1R {
+    bits: u8,
+}
+impl P5SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6SEL1R {
+    bits: u8,
+}
+impl P6SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Select 1"]
+    #[inline]
+    pub fn p5sel1(&self) -> P5SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5SEL1R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Select 1"]
+    #[inline]
+    pub fn p6sel1(&self) -> P6SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6SEL1R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Select 1"]
+    #[inline]
+    pub fn p5sel1(&mut self) -> _P5SEL1W {
+        _P5SEL1W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Select 1"]
+    #[inline]
+    pub fn p6sel1(&mut self) -> _P6SEL1W {
+        _P6SEL1W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pcselc.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PCSELC {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P5SELCR {
+    bits: u8,
+}
+impl P5SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P6SELCR {
+    bits: u8,
+}
+impl P6SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P5SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P5SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P6SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P6SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 5 Complement Select"]
+    #[inline]
+    pub fn p5selc(&self) -> P5SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P5SELCR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 6 Complement Select"]
+    #[inline]
+    pub fn p6selc(&self) -> P6SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P6SELCR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 5 Complement Select"]
+    #[inline]
+    pub fn p5selc(&mut self) -> _P5SELCW {
+        _P5SELCW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 6 Complement Select"]
+    #[inline]
+    pub fn p6selc(&mut self) -> _P6SELCW {
+        _P6SELCW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pddir.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDDIR {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7DIRR {
+    bits: u8,
+}
+impl P7DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8DIRR {
+    bits: u8,
+}
+impl P8DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Direction"]
+    #[inline]
+    pub fn p7dir(&self) -> P7DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7DIRR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Direction"]
+    #[inline]
+    pub fn p8dir(&self) -> P8DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8DIRR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Direction"]
+    #[inline]
+    pub fn p7dir(&mut self) -> _P7DIRW {
+        _P7DIRW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Direction"]
+    #[inline]
+    pub fn p8dir(&mut self) -> _P8DIRW {
+        _P8DIRW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdds.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDDS {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7DSR {
+    bits: u8,
+}
+impl P7DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8DSR {
+    bits: u8,
+}
+impl P8DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Drive Strength"]
+    #[inline]
+    pub fn p7ds(&self) -> P7DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7DSR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Drive Strength"]
+    #[inline]
+    pub fn p8ds(&self) -> P8DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8DSR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Drive Strength"]
+    #[inline]
+    pub fn p7ds(&mut self) -> _P7DSW {
+        _P7DSW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Drive Strength"]
+    #[inline]
+    pub fn p8ds(&mut self) -> _P8DSW {
+        _P8DSW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdie.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDIE {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7IER {
+    bits: u8,
+}
+impl P7IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8IER {
+    bits: u8,
+}
+impl P8IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Interrupt Enable"]
+    #[inline]
+    pub fn p7ie(&self) -> P7IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7IER { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Interrupt Enable"]
+    #[inline]
+    pub fn p8ie(&self) -> P8IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8IER { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Interrupt Enable"]
+    #[inline]
+    pub fn p7ie(&mut self) -> _P7IEW {
+        _P7IEW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Interrupt Enable"]
+    #[inline]
+    pub fn p8ie(&mut self) -> _P8IEW {
+        _P8IEW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdies.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDIES {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7IESR {
+    bits: u8,
+}
+impl P7IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8IESR {
+    bits: u8,
+}
+impl P8IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Interrupt Edge Select"]
+    #[inline]
+    pub fn p7ies(&self) -> P7IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7IESR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Interrupt Edge Select"]
+    #[inline]
+    pub fn p8ies(&self) -> P8IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8IESR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Interrupt Edge Select"]
+    #[inline]
+    pub fn p7ies(&mut self) -> _P7IESW {
+        _P7IESW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Interrupt Edge Select"]
+    #[inline]
+    pub fn p8ies(&mut self) -> _P8IESW {
+        _P8IESW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdifg.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDIFG {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7IFGR {
+    bits: u8,
+}
+impl P7IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8IFGR {
+    bits: u8,
+}
+impl P8IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Interrupt Flag"]
+    #[inline]
+    pub fn p7ifg(&self) -> P7IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7IFGR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Interrupt Flag"]
+    #[inline]
+    pub fn p8ifg(&self) -> P8IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8IFGR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Interrupt Flag"]
+    #[inline]
+    pub fn p7ifg(&mut self) -> _P7IFGW {
+        _P7IFGW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Interrupt Flag"]
+    #[inline]
+    pub fn p8ifg(&mut self) -> _P8IFGW {
+        _P8IFGW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdin.rs

@@ -0,0 +1,62 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::PDIN {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7INR {
+    bits: u8,
+}
+impl P7INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8INR {
+    bits: u8,
+}
+impl P8INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Input"]
+    #[inline]
+    pub fn p7in(&self) -> P7INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7INR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Input"]
+    #[inline]
+    pub fn p8in(&self) -> P8INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8INR { bits }
+    }
+}

example-source/msp432p401r/src/dio/pdout.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDOUT {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7OUTR {
+    bits: u8,
+}
+impl P7OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8OUTR {
+    bits: u8,
+}
+impl P8OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Output"]
+    #[inline]
+    pub fn p7out(&self) -> P7OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7OUTR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Output"]
+    #[inline]
+    pub fn p8out(&self) -> P8OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8OUTR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Output"]
+    #[inline]
+    pub fn p7out(&mut self) -> _P7OUTW {
+        _P7OUTW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Output"]
+    #[inline]
+    pub fn p8out(&mut self) -> _P8OUTW {
+        _P8OUTW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdren.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDREN {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7RENR {
+    bits: u8,
+}
+impl P7RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8RENR {
+    bits: u8,
+}
+impl P8RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Resistor Enable"]
+    #[inline]
+    pub fn p7ren(&self) -> P7RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7RENR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Resistor Enable"]
+    #[inline]
+    pub fn p8ren(&self) -> P8RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8RENR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Resistor Enable"]
+    #[inline]
+    pub fn p7ren(&mut self) -> _P7RENW {
+        _P7RENW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Resistor Enable"]
+    #[inline]
+    pub fn p8ren(&mut self) -> _P8RENW {
+        _P8RENW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdsel0.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDSEL0 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7SEL0R {
+    bits: u8,
+}
+impl P7SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8SEL0R {
+    bits: u8,
+}
+impl P8SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Select 0"]
+    #[inline]
+    pub fn p7sel0(&self) -> P7SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7SEL0R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Select 0"]
+    #[inline]
+    pub fn p8sel0(&self) -> P8SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8SEL0R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Select 0"]
+    #[inline]
+    pub fn p7sel0(&mut self) -> _P7SEL0W {
+        _P7SEL0W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Select 0"]
+    #[inline]
+    pub fn p8sel0(&mut self) -> _P8SEL0W {
+        _P8SEL0W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdsel1.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDSEL1 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7SEL1R {
+    bits: u8,
+}
+impl P7SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8SEL1R {
+    bits: u8,
+}
+impl P8SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Select 1"]
+    #[inline]
+    pub fn p7sel1(&self) -> P7SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7SEL1R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Select 1"]
+    #[inline]
+    pub fn p8sel1(&self) -> P8SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8SEL1R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Select 1"]
+    #[inline]
+    pub fn p7sel1(&mut self) -> _P7SEL1W {
+        _P7SEL1W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Select 1"]
+    #[inline]
+    pub fn p8sel1(&mut self) -> _P8SEL1W {
+        _P8SEL1W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pdselc.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PDSELC {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P7SELCR {
+    bits: u8,
+}
+impl P7SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P8SELCR {
+    bits: u8,
+}
+impl P8SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P7SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P7SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P8SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P8SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 7 Complement Select"]
+    #[inline]
+    pub fn p7selc(&self) -> P7SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P7SELCR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 8 Complement Select"]
+    #[inline]
+    pub fn p8selc(&self) -> P8SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P8SELCR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 7 Complement Select"]
+    #[inline]
+    pub fn p7selc(&mut self) -> _P7SELCW {
+        _P7SELCW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 8 Complement Select"]
+    #[inline]
+    pub fn p8selc(&mut self) -> _P8SELCW {
+        _P8SELCW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pedir.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEDIR {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9DIRR {
+    bits: u8,
+}
+impl P9DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10DIRR {
+    bits: u8,
+}
+impl P10DIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10DIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10DIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Direction"]
+    #[inline]
+    pub fn p9dir(&self) -> P9DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9DIRR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Direction"]
+    #[inline]
+    pub fn p10dir(&self) -> P10DIRR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10DIRR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Direction"]
+    #[inline]
+    pub fn p9dir(&mut self) -> _P9DIRW {
+        _P9DIRW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Direction"]
+    #[inline]
+    pub fn p10dir(&mut self) -> _P10DIRW {
+        _P10DIRW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/peds.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEDS {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9DSR {
+    bits: u8,
+}
+impl P9DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10DSR {
+    bits: u8,
+}
+impl P10DSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10DSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10DSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Drive Strength"]
+    #[inline]
+    pub fn p9ds(&self) -> P9DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9DSR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Drive Strength"]
+    #[inline]
+    pub fn p10ds(&self) -> P10DSR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10DSR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Drive Strength"]
+    #[inline]
+    pub fn p9ds(&mut self) -> _P9DSW {
+        _P9DSW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Drive Strength"]
+    #[inline]
+    pub fn p10ds(&mut self) -> _P10DSW {
+        _P10DSW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/peie.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEIE {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9IER {
+    bits: u8,
+}
+impl P9IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10IER {
+    bits: u8,
+}
+impl P10IER {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10IEW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10IEW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Interrupt Enable"]
+    #[inline]
+    pub fn p9ie(&self) -> P9IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9IER { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Interrupt Enable"]
+    #[inline]
+    pub fn p10ie(&self) -> P10IER {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10IER { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Interrupt Enable"]
+    #[inline]
+    pub fn p9ie(&mut self) -> _P9IEW {
+        _P9IEW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Interrupt Enable"]
+    #[inline]
+    pub fn p10ie(&mut self) -> _P10IEW {
+        _P10IEW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/peies.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEIES {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9IESR {
+    bits: u8,
+}
+impl P9IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10IESR {
+    bits: u8,
+}
+impl P10IESR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10IESW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10IESW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Interrupt Edge Select"]
+    #[inline]
+    pub fn p9ies(&self) -> P9IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9IESR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Interrupt Edge Select"]
+    #[inline]
+    pub fn p10ies(&self) -> P10IESR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10IESR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Interrupt Edge Select"]
+    #[inline]
+    pub fn p9ies(&mut self) -> _P9IESW {
+        _P9IESW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Interrupt Edge Select"]
+    #[inline]
+    pub fn p10ies(&mut self) -> _P10IESW {
+        _P10IESW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/peifg.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEIFG {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9IFGR {
+    bits: u8,
+}
+impl P9IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10IFGR {
+    bits: u8,
+}
+impl P10IFGR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10IFGW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10IFGW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Interrupt Flag"]
+    #[inline]
+    pub fn p9ifg(&self) -> P9IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9IFGR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Interrupt Flag"]
+    #[inline]
+    pub fn p10ifg(&self) -> P10IFGR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10IFGR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Interrupt Flag"]
+    #[inline]
+    pub fn p9ifg(&mut self) -> _P9IFGW {
+        _P9IFGW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Interrupt Flag"]
+    #[inline]
+    pub fn p10ifg(&mut self) -> _P10IFGW {
+        _P10IFGW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pein.rs

@@ -0,0 +1,62 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::PEIN {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9INR {
+    bits: u8,
+}
+impl P9INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10INR {
+    bits: u8,
+}
+impl P10INR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Input"]
+    #[inline]
+    pub fn p9in(&self) -> P9INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9INR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Input"]
+    #[inline]
+    pub fn p10in(&self) -> P10INR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10INR { bits }
+    }
+}

example-source/msp432p401r/src/dio/peout.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEOUT {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9OUTR {
+    bits: u8,
+}
+impl P9OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10OUTR {
+    bits: u8,
+}
+impl P10OUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10OUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10OUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Output"]
+    #[inline]
+    pub fn p9out(&self) -> P9OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9OUTR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Output"]
+    #[inline]
+    pub fn p10out(&self) -> P10OUTR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10OUTR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Output"]
+    #[inline]
+    pub fn p9out(&mut self) -> _P9OUTW {
+        _P9OUTW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Output"]
+    #[inline]
+    pub fn p10out(&mut self) -> _P10OUTW {
+        _P10OUTW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/peren.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PEREN {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9RENR {
+    bits: u8,
+}
+impl P9RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10RENR {
+    bits: u8,
+}
+impl P10RENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10RENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10RENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Resistor Enable"]
+    #[inline]
+    pub fn p9ren(&self) -> P9RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9RENR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Resistor Enable"]
+    #[inline]
+    pub fn p10ren(&self) -> P10RENR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10RENR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Resistor Enable"]
+    #[inline]
+    pub fn p9ren(&mut self) -> _P9RENW {
+        _P9RENW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Resistor Enable"]
+    #[inline]
+    pub fn p10ren(&mut self) -> _P10RENW {
+        _P10RENW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pesel0.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PESEL0 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9SEL0R {
+    bits: u8,
+}
+impl P9SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10SEL0R {
+    bits: u8,
+}
+impl P10SEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10SEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10SEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Select 0"]
+    #[inline]
+    pub fn p9sel0(&self) -> P9SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9SEL0R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Select 0"]
+    #[inline]
+    pub fn p10sel0(&self) -> P10SEL0R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10SEL0R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Select 0"]
+    #[inline]
+    pub fn p9sel0(&mut self) -> _P9SEL0W {
+        _P9SEL0W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Select 0"]
+    #[inline]
+    pub fn p10sel0(&mut self) -> _P10SEL0W {
+        _P10SEL0W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pesel1.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PESEL1 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9SEL1R {
+    bits: u8,
+}
+impl P9SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10SEL1R {
+    bits: u8,
+}
+impl P10SEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10SEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10SEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Select 1"]
+    #[inline]
+    pub fn p9sel1(&self) -> P9SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9SEL1R { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Select 1"]
+    #[inline]
+    pub fn p10sel1(&self) -> P10SEL1R {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10SEL1R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Select 1"]
+    #[inline]
+    pub fn p9sel1(&mut self) -> _P9SEL1W {
+        _P9SEL1W { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Select 1"]
+    #[inline]
+    pub fn p10sel1(&mut self) -> _P10SEL1W {
+        _P10SEL1W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/peselc.rs

@@ -0,0 +1,146 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PESELC {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P9SELCR {
+    bits: u8,
+}
+impl P9SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Value of the field"]
+pub struct P10SELCR {
+    bits: u8,
+}
+impl P10SELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u8 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P9SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P9SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+#[doc = r" Proxy"]
+pub struct _P10SELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _P10SELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u8) -> &'a mut W {
+        const MASK: u8 = 255;
+        const OFFSET: u8 = 8;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:7 - Port 9 Complement Select"]
+    #[inline]
+    pub fn p9selc(&self) -> P9SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P9SELCR { bits }
+    }
+    #[doc = "Bits 8:15 - Port 10 Complement Select"]
+    #[inline]
+    pub fn p10selc(&self) -> P10SELCR {
+        let bits = {
+            const MASK: u8 = 255;
+            const OFFSET: u8 = 8;
+            ((self.bits >> OFFSET) & MASK as u16) as u8
+        };
+        P10SELCR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:7 - Port 9 Complement Select"]
+    #[inline]
+    pub fn p9selc(&mut self) -> _P9SELCW {
+        _P9SELCW { w: self }
+    }
+    #[doc = "Bits 8:15 - Port 10 Complement Select"]
+    #[inline]
+    pub fn p10selc(&mut self) -> _P10SELCW {
+        _P10SELCW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjdir.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJDIR {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJDIRR {
+    bits: u16,
+}
+impl PJDIRR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJDIRW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJDIRW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Direction"]
+    #[inline]
+    pub fn pjdir(&self) -> PJDIRR {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJDIRR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Direction"]
+    #[inline]
+    pub fn pjdir(&mut self) -> _PJDIRW {
+        _PJDIRW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjds.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJDS {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJDSR {
+    bits: u16,
+}
+impl PJDSR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJDSW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJDSW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Drive Strength"]
+    #[inline]
+    pub fn pjds(&self) -> PJDSR {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJDSR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Drive Strength"]
+    #[inline]
+    pub fn pjds(&mut self) -> _PJDSW {
+        _PJDSW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjin.rs

@@ -0,0 +1,41 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+impl super::PJIN {
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJINR {
+    bits: u16,
+}
+impl PJINR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Input"]
+    #[inline]
+    pub fn pjin(&self) -> PJINR {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJINR { bits }
+    }
+}

example-source/msp432p401r/src/dio/pjout.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJOUT {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJOUTR {
+    bits: u16,
+}
+impl PJOUTR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJOUTW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJOUTW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Output"]
+    #[inline]
+    pub fn pjout(&self) -> PJOUTR {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJOUTR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Output"]
+    #[inline]
+    pub fn pjout(&mut self) -> _PJOUTW {
+        _PJOUTW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjren.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJREN {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJRENR {
+    bits: u16,
+}
+impl PJRENR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJRENW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJRENW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Resistor Enable"]
+    #[inline]
+    pub fn pjren(&self) -> PJRENR {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJRENR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Resistor Enable"]
+    #[inline]
+    pub fn pjren(&mut self) -> _PJRENW {
+        _PJRENW { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjsel0.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJSEL0 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJSEL0R {
+    bits: u16,
+}
+impl PJSEL0R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJSEL0W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJSEL0W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Select 0"]
+    #[inline]
+    pub fn pjsel0(&self) -> PJSEL0R {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJSEL0R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Select 0"]
+    #[inline]
+    pub fn pjsel0(&mut self) -> _PJSEL0W {
+        _PJSEL0W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjsel1.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJSEL1 {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJSEL1R {
+    bits: u16,
+}
+impl PJSEL1R {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJSEL1W<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJSEL1W<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Select 1"]
+    #[inline]
+    pub fn pjsel1(&self) -> PJSEL1R {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJSEL1R { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Select 1"]
+    #[inline]
+    pub fn pjsel1(&mut self) -> _PJSEL1W {
+        _PJSEL1W { w: self }
+    }
+}

example-source/msp432p401r/src/dio/pjselc.rs

@@ -0,0 +1,105 @@
+#[doc = r" Value read from the register"]
+pub struct R {
+    bits: u16,
+}
+#[doc = r" Value to write to the register"]
+pub struct W {
+    bits: u16,
+}
+impl super::PJSELC {
+    #[doc = r" Modifies the contents of the register"]
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
+    {
+        let bits = self.register.get();
+        let r = R { bits: bits };
+        let mut w = W { bits: bits };
+        f(&r, &mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Reads the contents of the register"]
+    #[inline]
+    pub fn read(&self) -> R {
+        R {
+            bits: self.register.get(),
+        }
+    }
+    #[doc = r" Writes to the register"]
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: FnOnce(&mut W) -> &mut W,
+    {
+        let mut w = W::reset_value();
+        f(&mut w);
+        self.register.set(w.bits);
+    }
+    #[doc = r" Writes the reset value to the register"]
+    #[inline]
+    pub fn reset(&self) {
+        self.write(|w| w)
+    }
+}
+#[doc = r" Value of the field"]
+pub struct PJSELCR {
+    bits: u16,
+}
+impl PJSELCR {
+    #[doc = r" Value of the field as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+}
+#[doc = r" Proxy"]
+pub struct _PJSELCW<'a> {
+    w: &'a mut W,
+}
+impl<'a> _PJSELCW<'a> {
+    #[doc = r" Writes raw bits to the field"]
+    #[inline]
+    pub unsafe fn bits(self, value: u16) -> &'a mut W {
+        const MASK: u16 = 65535;
+        const OFFSET: u8 = 0;
+        self.w.bits &= !((MASK as u16) << OFFSET);
+        self.w.bits |= ((value & MASK) as u16) << OFFSET;
+        self.w
+    }
+}
+impl R {
+    #[doc = r" Value of the register as raw bits"]
+    #[inline]
+    pub fn bits(&self) -> u16 {
+        self.bits
+    }
+    #[doc = "Bits 0:15 - Port J Complement Select"]
+    #[inline]
+    pub fn pjselc(&self) -> PJSELCR {
+        let bits = {
+            const MASK: u16 = 65535;
+            const OFFSET: u8 = 0;
+            ((self.bits >> OFFSET) & MASK as u16) as u16
+        };
+        PJSELCR { bits }
+    }
+}
+impl W {
+    #[doc = r" Reset value of the register"]
+    #[inline]
+    pub fn reset_value() -> W {
+        W { bits: 0 }
+    }
+    #[doc = r" Writes raw bits to the register"]
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+    #[doc = "Bits 0:15 - Port J Complement Select"]
+    #[inline]
+    pub fn pjselc(&mut self) -> _PJSELCW {
+        _PJSELCW { w: self }
+    }
+}