596 lines
15 KiB
Rust
596 lines
15 KiB
Rust
#[doc = r" Register block"]
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#[repr(C)]
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pub struct RegisterBlock {
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#[doc = "0x00 - Port A Input"]
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pub pain: PAIN,
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#[doc = "0x02 - Port A Output"]
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pub paout: PAOUT,
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#[doc = "0x04 - Port A Direction"]
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pub padir: PADIR,
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#[doc = "0x06 - Port A Resistor Enable"]
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pub paren: PAREN,
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#[doc = "0x08 - Port A Drive Strength"]
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pub pads: PADS,
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#[doc = "0x0a - Port A Select 0"]
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pub pasel0: PASEL0,
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#[doc = "0x0c - Port A Select 1"]
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pub pasel1: PASEL1,
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#[doc = "0x0e - Port 1 Interrupt Vector Register"]
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pub p1iv: P1IV,
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_reserved0: [u8; 6usize],
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#[doc = "0x16 - Port A Complement Select"]
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pub paselc: PASELC,
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#[doc = "0x18 - Port A Interrupt Edge Select"]
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pub paies: PAIES,
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#[doc = "0x1a - Port A Interrupt Enable"]
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pub paie: PAIE,
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#[doc = "0x1c - Port A Interrupt Flag"]
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pub paifg: PAIFG,
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#[doc = "0x1e - Port 2 Interrupt Vector Register"]
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pub p2iv: P2IV,
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#[doc = "0x20 - Port B Input"]
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pub pbin: PBIN,
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#[doc = "0x22 - Port B Output"]
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pub pbout: PBOUT,
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#[doc = "0x24 - Port B Direction"]
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pub pbdir: PBDIR,
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#[doc = "0x26 - Port B Resistor Enable"]
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pub pbren: PBREN,
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#[doc = "0x28 - Port B Drive Strength"]
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pub pbds: PBDS,
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#[doc = "0x2a - Port B Select 0"]
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pub pbsel0: PBSEL0,
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#[doc = "0x2c - Port B Select 1"]
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pub pbsel1: PBSEL1,
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#[doc = "0x2e - Port 3 Interrupt Vector Register"]
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pub p3iv: P3IV,
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_reserved1: [u8; 6usize],
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#[doc = "0x36 - Port B Complement Select"]
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pub pbselc: PBSELC,
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#[doc = "0x38 - Port B Interrupt Edge Select"]
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pub pbies: PBIES,
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#[doc = "0x3a - Port B Interrupt Enable"]
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pub pbie: PBIE,
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#[doc = "0x3c - Port B Interrupt Flag"]
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pub pbifg: PBIFG,
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#[doc = "0x3e - Port 4 Interrupt Vector Register"]
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pub p4iv: P4IV,
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#[doc = "0x40 - Port C Input"]
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pub pcin: PCIN,
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#[doc = "0x42 - Port C Output"]
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pub pcout: PCOUT,
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#[doc = "0x44 - Port C Direction"]
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pub pcdir: PCDIR,
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#[doc = "0x46 - Port C Resistor Enable"]
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pub pcren: PCREN,
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#[doc = "0x48 - Port C Drive Strength"]
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pub pcds: PCDS,
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#[doc = "0x4a - Port C Select 0"]
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pub pcsel0: PCSEL0,
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#[doc = "0x4c - Port C Select 1"]
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pub pcsel1: PCSEL1,
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#[doc = "0x4e - Port 5 Interrupt Vector Register"]
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pub p5iv: P5IV,
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_reserved2: [u8; 6usize],
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#[doc = "0x56 - Port C Complement Select"]
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pub pcselc: PCSELC,
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#[doc = "0x58 - Port C Interrupt Edge Select"]
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pub pcies: PCIES,
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#[doc = "0x5a - Port C Interrupt Enable"]
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pub pcie: PCIE,
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#[doc = "0x5c - Port C Interrupt Flag"]
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pub pcifg: PCIFG,
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#[doc = "0x5e - Port 6 Interrupt Vector Register"]
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pub p6iv: P6IV,
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#[doc = "0x60 - Port D Input"]
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pub pdin: PDIN,
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#[doc = "0x62 - Port D Output"]
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pub pdout: PDOUT,
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#[doc = "0x64 - Port D Direction"]
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pub pddir: PDDIR,
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#[doc = "0x66 - Port D Resistor Enable"]
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pub pdren: PDREN,
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#[doc = "0x68 - Port D Drive Strength"]
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pub pdds: PDDS,
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#[doc = "0x6a - Port D Select 0"]
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pub pdsel0: PDSEL0,
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#[doc = "0x6c - Port D Select 1"]
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pub pdsel1: PDSEL1,
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#[doc = "0x6e - Port 7 Interrupt Vector Register"]
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pub p7iv: P7IV,
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_reserved3: [u8; 6usize],
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#[doc = "0x76 - Port D Complement Select"]
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pub pdselc: PDSELC,
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#[doc = "0x78 - Port D Interrupt Edge Select"]
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pub pdies: PDIES,
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#[doc = "0x7a - Port D Interrupt Enable"]
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pub pdie: PDIE,
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#[doc = "0x7c - Port D Interrupt Flag"]
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pub pdifg: PDIFG,
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#[doc = "0x7e - Port 8 Interrupt Vector Register"]
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pub p8iv: P8IV,
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#[doc = "0x80 - Port E Input"]
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pub pein: PEIN,
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#[doc = "0x82 - Port E Output"]
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pub peout: PEOUT,
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#[doc = "0x84 - Port E Direction"]
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pub pedir: PEDIR,
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#[doc = "0x86 - Port E Resistor Enable"]
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pub peren: PEREN,
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#[doc = "0x88 - Port E Drive Strength"]
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pub peds: PEDS,
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#[doc = "0x8a - Port E Select 0"]
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pub pesel0: PESEL0,
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#[doc = "0x8c - Port E Select 1"]
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pub pesel1: PESEL1,
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#[doc = "0x8e - Port 9 Interrupt Vector Register"]
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pub p9iv: P9IV,
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_reserved4: [u8; 6usize],
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#[doc = "0x96 - Port E Complement Select"]
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pub peselc: PESELC,
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#[doc = "0x98 - Port E Interrupt Edge Select"]
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pub peies: PEIES,
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#[doc = "0x9a - Port E Interrupt Enable"]
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pub peie: PEIE,
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#[doc = "0x9c - Port E Interrupt Flag"]
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pub peifg: PEIFG,
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#[doc = "0x9e - Port 10 Interrupt Vector Register"]
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pub p10iv: P10IV,
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_reserved5: [u8; 128usize],
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#[doc = "0x120 - Port J Input"]
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pub pjin: PJIN,
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#[doc = "0x122 - Port J Output"]
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pub pjout: PJOUT,
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#[doc = "0x124 - Port J Direction"]
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pub pjdir: PJDIR,
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#[doc = "0x126 - Port J Resistor Enable"]
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pub pjren: PJREN,
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#[doc = "0x128 - Port J Drive Strength"]
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pub pjds: PJDS,
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#[doc = "0x12a - Port J Select 0"]
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pub pjsel0: PJSEL0,
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#[doc = "0x12c - Port J Select 1"]
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pub pjsel1: PJSEL1,
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_reserved6: [u8; 8usize],
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#[doc = "0x136 - Port J Complement Select"]
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pub pjselc: PJSELC,
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}
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#[doc = "Port A Input"]
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pub struct PAIN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Input"]
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pub mod pain;
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#[doc = "Port A Output"]
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pub struct PAOUT {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Output"]
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pub mod paout;
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#[doc = "Port A Direction"]
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pub struct PADIR {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Direction"]
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pub mod padir;
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#[doc = "Port A Resistor Enable"]
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pub struct PAREN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Resistor Enable"]
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pub mod paren;
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#[doc = "Port A Drive Strength"]
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pub struct PADS {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Drive Strength"]
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pub mod pads;
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#[doc = "Port A Select 0"]
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pub struct PASEL0 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Select 0"]
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pub mod pasel0;
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#[doc = "Port A Select 1"]
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pub struct PASEL1 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Select 1"]
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pub mod pasel1;
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#[doc = "Port 1 Interrupt Vector Register"]
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pub struct P1IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 1 Interrupt Vector Register"]
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pub mod p1iv;
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#[doc = "Port A Complement Select"]
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pub struct PASELC {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Complement Select"]
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pub mod paselc;
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#[doc = "Port A Interrupt Edge Select"]
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pub struct PAIES {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Interrupt Edge Select"]
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pub mod paies;
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#[doc = "Port A Interrupt Enable"]
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pub struct PAIE {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Interrupt Enable"]
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pub mod paie;
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#[doc = "Port A Interrupt Flag"]
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pub struct PAIFG {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port A Interrupt Flag"]
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pub mod paifg;
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#[doc = "Port 2 Interrupt Vector Register"]
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pub struct P2IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 2 Interrupt Vector Register"]
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pub mod p2iv;
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#[doc = "Port B Input"]
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pub struct PBIN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Input"]
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pub mod pbin;
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#[doc = "Port B Output"]
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pub struct PBOUT {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Output"]
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pub mod pbout;
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#[doc = "Port B Direction"]
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pub struct PBDIR {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Direction"]
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pub mod pbdir;
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#[doc = "Port B Resistor Enable"]
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pub struct PBREN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Resistor Enable"]
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pub mod pbren;
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#[doc = "Port B Drive Strength"]
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pub struct PBDS {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Drive Strength"]
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pub mod pbds;
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#[doc = "Port B Select 0"]
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pub struct PBSEL0 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Select 0"]
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pub mod pbsel0;
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#[doc = "Port B Select 1"]
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pub struct PBSEL1 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Select 1"]
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pub mod pbsel1;
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#[doc = "Port 3 Interrupt Vector Register"]
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pub struct P3IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 3 Interrupt Vector Register"]
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pub mod p3iv;
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#[doc = "Port B Complement Select"]
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pub struct PBSELC {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Complement Select"]
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pub mod pbselc;
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#[doc = "Port B Interrupt Edge Select"]
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pub struct PBIES {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Interrupt Edge Select"]
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pub mod pbies;
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#[doc = "Port B Interrupt Enable"]
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pub struct PBIE {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Interrupt Enable"]
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pub mod pbie;
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#[doc = "Port B Interrupt Flag"]
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pub struct PBIFG {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port B Interrupt Flag"]
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pub mod pbifg;
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#[doc = "Port 4 Interrupt Vector Register"]
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pub struct P4IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 4 Interrupt Vector Register"]
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pub mod p4iv;
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#[doc = "Port C Input"]
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pub struct PCIN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Input"]
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pub mod pcin;
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#[doc = "Port C Output"]
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pub struct PCOUT {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Output"]
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pub mod pcout;
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#[doc = "Port C Direction"]
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pub struct PCDIR {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Direction"]
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pub mod pcdir;
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#[doc = "Port C Resistor Enable"]
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pub struct PCREN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Resistor Enable"]
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pub mod pcren;
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#[doc = "Port C Drive Strength"]
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pub struct PCDS {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Drive Strength"]
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pub mod pcds;
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#[doc = "Port C Select 0"]
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pub struct PCSEL0 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Select 0"]
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pub mod pcsel0;
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#[doc = "Port C Select 1"]
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pub struct PCSEL1 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Select 1"]
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pub mod pcsel1;
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#[doc = "Port 5 Interrupt Vector Register"]
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pub struct P5IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 5 Interrupt Vector Register"]
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pub mod p5iv;
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#[doc = "Port C Complement Select"]
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pub struct PCSELC {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Complement Select"]
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pub mod pcselc;
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#[doc = "Port C Interrupt Edge Select"]
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pub struct PCIES {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Interrupt Edge Select"]
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pub mod pcies;
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#[doc = "Port C Interrupt Enable"]
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pub struct PCIE {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Interrupt Enable"]
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pub mod pcie;
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#[doc = "Port C Interrupt Flag"]
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pub struct PCIFG {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port C Interrupt Flag"]
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pub mod pcifg;
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#[doc = "Port 6 Interrupt Vector Register"]
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pub struct P6IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 6 Interrupt Vector Register"]
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pub mod p6iv;
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#[doc = "Port D Input"]
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pub struct PDIN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Input"]
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pub mod pdin;
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#[doc = "Port D Output"]
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pub struct PDOUT {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Output"]
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pub mod pdout;
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#[doc = "Port D Direction"]
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pub struct PDDIR {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Direction"]
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pub mod pddir;
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#[doc = "Port D Resistor Enable"]
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pub struct PDREN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Resistor Enable"]
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pub mod pdren;
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#[doc = "Port D Drive Strength"]
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pub struct PDDS {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Drive Strength"]
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pub mod pdds;
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#[doc = "Port D Select 0"]
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pub struct PDSEL0 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Select 0"]
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pub mod pdsel0;
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#[doc = "Port D Select 1"]
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pub struct PDSEL1 {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Select 1"]
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pub mod pdsel1;
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#[doc = "Port 7 Interrupt Vector Register"]
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pub struct P7IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 7 Interrupt Vector Register"]
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pub mod p7iv;
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#[doc = "Port D Complement Select"]
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pub struct PDSELC {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Complement Select"]
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pub mod pdselc;
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#[doc = "Port D Interrupt Edge Select"]
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pub struct PDIES {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Interrupt Edge Select"]
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pub mod pdies;
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#[doc = "Port D Interrupt Enable"]
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pub struct PDIE {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Interrupt Enable"]
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pub mod pdie;
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#[doc = "Port D Interrupt Flag"]
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pub struct PDIFG {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port D Interrupt Flag"]
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pub mod pdifg;
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#[doc = "Port 8 Interrupt Vector Register"]
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pub struct P8IV {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port 8 Interrupt Vector Register"]
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pub mod p8iv;
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#[doc = "Port E Input"]
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pub struct PEIN {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port E Input"]
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pub mod pein;
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#[doc = "Port E Output"]
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pub struct PEOUT {
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register: ::vcell::VolatileCell<u16>,
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}
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#[doc = "Port E Output"]
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pub mod peout;
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#[doc = "Port E Direction"]
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pub struct PEDIR {
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register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Direction"]
|
|
pub mod pedir;
|
|
#[doc = "Port E Resistor Enable"]
|
|
pub struct PEREN {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Resistor Enable"]
|
|
pub mod peren;
|
|
#[doc = "Port E Drive Strength"]
|
|
pub struct PEDS {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Drive Strength"]
|
|
pub mod peds;
|
|
#[doc = "Port E Select 0"]
|
|
pub struct PESEL0 {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Select 0"]
|
|
pub mod pesel0;
|
|
#[doc = "Port E Select 1"]
|
|
pub struct PESEL1 {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Select 1"]
|
|
pub mod pesel1;
|
|
#[doc = "Port 9 Interrupt Vector Register"]
|
|
pub struct P9IV {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port 9 Interrupt Vector Register"]
|
|
pub mod p9iv;
|
|
#[doc = "Port E Complement Select"]
|
|
pub struct PESELC {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Complement Select"]
|
|
pub mod peselc;
|
|
#[doc = "Port E Interrupt Edge Select"]
|
|
pub struct PEIES {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Interrupt Edge Select"]
|
|
pub mod peies;
|
|
#[doc = "Port E Interrupt Enable"]
|
|
pub struct PEIE {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Interrupt Enable"]
|
|
pub mod peie;
|
|
#[doc = "Port E Interrupt Flag"]
|
|
pub struct PEIFG {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port E Interrupt Flag"]
|
|
pub mod peifg;
|
|
#[doc = "Port 10 Interrupt Vector Register"]
|
|
pub struct P10IV {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port 10 Interrupt Vector Register"]
|
|
pub mod p10iv;
|
|
#[doc = "Port J Input"]
|
|
pub struct PJIN {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Input"]
|
|
pub mod pjin;
|
|
#[doc = "Port J Output"]
|
|
pub struct PJOUT {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Output"]
|
|
pub mod pjout;
|
|
#[doc = "Port J Direction"]
|
|
pub struct PJDIR {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Direction"]
|
|
pub mod pjdir;
|
|
#[doc = "Port J Resistor Enable"]
|
|
pub struct PJREN {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Resistor Enable"]
|
|
pub mod pjren;
|
|
#[doc = "Port J Drive Strength"]
|
|
pub struct PJDS {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Drive Strength"]
|
|
pub mod pjds;
|
|
#[doc = "Port J Select 0"]
|
|
pub struct PJSEL0 {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Select 0"]
|
|
pub mod pjsel0;
|
|
#[doc = "Port J Select 1"]
|
|
pub struct PJSEL1 {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Select 1"]
|
|
pub mod pjsel1;
|
|
#[doc = "Port J Complement Select"]
|
|
pub struct PJSELC {
|
|
register: ::vcell::VolatileCell<u16>,
|
|
}
|
|
#[doc = "Port J Complement Select"]
|
|
pub mod pjselc;
|