1612 lines
42 KiB
Rust
1612 lines
42 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::CSCTL1 {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `SELM`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SELMR {
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#[doc = "when LFXT available, otherwise REFOCLK"]
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SELM_0,
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#[doc = "undocumented"]
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SELM_1,
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#[doc = "undocumented"]
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SELM_2,
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#[doc = "undocumented"]
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SELM_3,
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#[doc = "undocumented"]
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SELM_4,
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#[doc = "when HFXT available, otherwise DCOCLK"]
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SELM_5,
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#[doc = "when HFXT2 available, otherwise DCOCLK"]
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SELM_6,
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#[doc = "for future use. Defaults to DCOCLK. Not recommended for use\r\r\nto ensure future compatibilities."]
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SELM_7,
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}
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impl SELMR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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SELMR::SELM_0 => 0,
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SELMR::SELM_1 => 1,
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SELMR::SELM_2 => 2,
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SELMR::SELM_3 => 3,
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SELMR::SELM_4 => 4,
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SELMR::SELM_5 => 5,
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SELMR::SELM_6 => 6,
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SELMR::SELM_7 => 7,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> SELMR {
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match value {
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0 => SELMR::SELM_0,
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1 => SELMR::SELM_1,
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2 => SELMR::SELM_2,
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3 => SELMR::SELM_3,
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4 => SELMR::SELM_4,
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5 => SELMR::SELM_5,
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6 => SELMR::SELM_6,
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7 => SELMR::SELM_7,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `SELM_0`"]
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#[inline]
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pub fn is_selm_0(&self) -> bool {
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*self == SELMR::SELM_0
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}
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#[doc = "Checks if the value of the field is `SELM_1`"]
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#[inline]
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pub fn is_selm_1(&self) -> bool {
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*self == SELMR::SELM_1
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}
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#[doc = "Checks if the value of the field is `SELM_2`"]
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#[inline]
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pub fn is_selm_2(&self) -> bool {
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*self == SELMR::SELM_2
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}
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#[doc = "Checks if the value of the field is `SELM_3`"]
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#[inline]
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pub fn is_selm_3(&self) -> bool {
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*self == SELMR::SELM_3
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}
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#[doc = "Checks if the value of the field is `SELM_4`"]
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#[inline]
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pub fn is_selm_4(&self) -> bool {
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*self == SELMR::SELM_4
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}
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#[doc = "Checks if the value of the field is `SELM_5`"]
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#[inline]
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pub fn is_selm_5(&self) -> bool {
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*self == SELMR::SELM_5
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}
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#[doc = "Checks if the value of the field is `SELM_6`"]
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#[inline]
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pub fn is_selm_6(&self) -> bool {
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*self == SELMR::SELM_6
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}
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#[doc = "Checks if the value of the field is `SELM_7`"]
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#[inline]
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pub fn is_selm_7(&self) -> bool {
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*self == SELMR::SELM_7
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}
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}
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#[doc = "Possible values of the field `SELS`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SELSR {
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#[doc = "when LFXT available, otherwise REFOCLK"]
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SELS_0,
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#[doc = "undocumented"]
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SELS_1,
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#[doc = "undocumented"]
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SELS_2,
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#[doc = "undocumented"]
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SELS_3,
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#[doc = "undocumented"]
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SELS_4,
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#[doc = "when HFXT available, otherwise DCOCLK"]
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SELS_5,
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#[doc = "when HFXT2 available, otherwise DCOCLK"]
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SELS_6,
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#[doc = "for furture use. Defaults to DCOCLK. Do not use to ensure future compatibilities."]
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SELS_7,
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}
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impl SELSR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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SELSR::SELS_0 => 0,
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SELSR::SELS_1 => 1,
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SELSR::SELS_2 => 2,
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SELSR::SELS_3 => 3,
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SELSR::SELS_4 => 4,
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SELSR::SELS_5 => 5,
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SELSR::SELS_6 => 6,
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SELSR::SELS_7 => 7,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> SELSR {
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match value {
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0 => SELSR::SELS_0,
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1 => SELSR::SELS_1,
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2 => SELSR::SELS_2,
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3 => SELSR::SELS_3,
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4 => SELSR::SELS_4,
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5 => SELSR::SELS_5,
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6 => SELSR::SELS_6,
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7 => SELSR::SELS_7,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `SELS_0`"]
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#[inline]
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pub fn is_sels_0(&self) -> bool {
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*self == SELSR::SELS_0
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}
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#[doc = "Checks if the value of the field is `SELS_1`"]
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#[inline]
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pub fn is_sels_1(&self) -> bool {
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*self == SELSR::SELS_1
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}
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#[doc = "Checks if the value of the field is `SELS_2`"]
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#[inline]
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pub fn is_sels_2(&self) -> bool {
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*self == SELSR::SELS_2
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}
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#[doc = "Checks if the value of the field is `SELS_3`"]
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#[inline]
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pub fn is_sels_3(&self) -> bool {
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*self == SELSR::SELS_3
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}
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#[doc = "Checks if the value of the field is `SELS_4`"]
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#[inline]
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pub fn is_sels_4(&self) -> bool {
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*self == SELSR::SELS_4
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}
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#[doc = "Checks if the value of the field is `SELS_5`"]
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#[inline]
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pub fn is_sels_5(&self) -> bool {
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*self == SELSR::SELS_5
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}
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#[doc = "Checks if the value of the field is `SELS_6`"]
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#[inline]
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pub fn is_sels_6(&self) -> bool {
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*self == SELSR::SELS_6
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}
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#[doc = "Checks if the value of the field is `SELS_7`"]
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#[inline]
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pub fn is_sels_7(&self) -> bool {
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*self == SELSR::SELS_7
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}
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}
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#[doc = "Possible values of the field `SELA`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SELAR {
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#[doc = "when LFXT available, otherwise REFOCLK"]
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SELA_0,
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#[doc = "undocumented"]
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SELA_1,
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#[doc = "undocumented"]
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SELA_2,
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#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
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SELA_3,
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#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
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SELA_4,
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#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
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SELA_5,
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#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
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SELA_6,
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#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
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SELA_7,
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}
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impl SELAR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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SELAR::SELA_0 => 0,
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SELAR::SELA_1 => 1,
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SELAR::SELA_2 => 2,
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SELAR::SELA_3 => 3,
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SELAR::SELA_4 => 4,
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SELAR::SELA_5 => 5,
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SELAR::SELA_6 => 6,
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SELAR::SELA_7 => 7,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> SELAR {
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match value {
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0 => SELAR::SELA_0,
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1 => SELAR::SELA_1,
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2 => SELAR::SELA_2,
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3 => SELAR::SELA_3,
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4 => SELAR::SELA_4,
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5 => SELAR::SELA_5,
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6 => SELAR::SELA_6,
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7 => SELAR::SELA_7,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `SELA_0`"]
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#[inline]
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pub fn is_sela_0(&self) -> bool {
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*self == SELAR::SELA_0
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}
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#[doc = "Checks if the value of the field is `SELA_1`"]
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#[inline]
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pub fn is_sela_1(&self) -> bool {
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*self == SELAR::SELA_1
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}
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#[doc = "Checks if the value of the field is `SELA_2`"]
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#[inline]
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pub fn is_sela_2(&self) -> bool {
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*self == SELAR::SELA_2
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}
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#[doc = "Checks if the value of the field is `SELA_3`"]
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#[inline]
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pub fn is_sela_3(&self) -> bool {
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*self == SELAR::SELA_3
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}
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#[doc = "Checks if the value of the field is `SELA_4`"]
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#[inline]
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pub fn is_sela_4(&self) -> bool {
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*self == SELAR::SELA_4
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}
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#[doc = "Checks if the value of the field is `SELA_5`"]
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#[inline]
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pub fn is_sela_5(&self) -> bool {
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*self == SELAR::SELA_5
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}
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#[doc = "Checks if the value of the field is `SELA_6`"]
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#[inline]
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pub fn is_sela_6(&self) -> bool {
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*self == SELAR::SELA_6
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}
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#[doc = "Checks if the value of the field is `SELA_7`"]
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#[inline]
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pub fn is_sela_7(&self) -> bool {
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*self == SELAR::SELA_7
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}
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}
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#[doc = "Possible values of the field `SELB`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SELBR {
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#[doc = "LFXTCLK"]
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SELB_0,
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#[doc = "REFOCLK"]
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SELB_1,
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}
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impl SELBR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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SELBR::SELB_0 => false,
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SELBR::SELB_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> SELBR {
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match value {
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false => SELBR::SELB_0,
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true => SELBR::SELB_1,
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}
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}
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#[doc = "Checks if the value of the field is `SELB_0`"]
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#[inline]
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pub fn is_selb_0(&self) -> bool {
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*self == SELBR::SELB_0
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}
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#[doc = "Checks if the value of the field is `SELB_1`"]
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#[inline]
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pub fn is_selb_1(&self) -> bool {
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*self == SELBR::SELB_1
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}
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}
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#[doc = "Possible values of the field `DIVM`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
|
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pub enum DIVMR {
|
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#[doc = "f(MCLK)/1"]
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DIVM_0,
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#[doc = "f(MCLK)/2"]
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DIVM_1,
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#[doc = "f(MCLK)/4"]
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DIVM_2,
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#[doc = "f(MCLK)/8"]
|
|
DIVM_3,
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#[doc = "f(MCLK)/16"]
|
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DIVM_4,
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#[doc = "f(MCLK)/32"]
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DIVM_5,
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#[doc = "f(MCLK)/64"]
|
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DIVM_6,
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#[doc = "f(MCLK)/128"]
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DIVM_7,
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}
|
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impl DIVMR {
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u8 {
|
|
match *self {
|
|
DIVMR::DIVM_0 => 0,
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|
DIVMR::DIVM_1 => 1,
|
|
DIVMR::DIVM_2 => 2,
|
|
DIVMR::DIVM_3 => 3,
|
|
DIVMR::DIVM_4 => 4,
|
|
DIVMR::DIVM_5 => 5,
|
|
DIVMR::DIVM_6 => 6,
|
|
DIVMR::DIVM_7 => 7,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: u8) -> DIVMR {
|
|
match value {
|
|
0 => DIVMR::DIVM_0,
|
|
1 => DIVMR::DIVM_1,
|
|
2 => DIVMR::DIVM_2,
|
|
3 => DIVMR::DIVM_3,
|
|
4 => DIVMR::DIVM_4,
|
|
5 => DIVMR::DIVM_5,
|
|
6 => DIVMR::DIVM_6,
|
|
7 => DIVMR::DIVM_7,
|
|
_ => unreachable!(),
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_0`"]
|
|
#[inline]
|
|
pub fn is_divm_0(&self) -> bool {
|
|
*self == DIVMR::DIVM_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_1`"]
|
|
#[inline]
|
|
pub fn is_divm_1(&self) -> bool {
|
|
*self == DIVMR::DIVM_1
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_2`"]
|
|
#[inline]
|
|
pub fn is_divm_2(&self) -> bool {
|
|
*self == DIVMR::DIVM_2
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_3`"]
|
|
#[inline]
|
|
pub fn is_divm_3(&self) -> bool {
|
|
*self == DIVMR::DIVM_3
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_4`"]
|
|
#[inline]
|
|
pub fn is_divm_4(&self) -> bool {
|
|
*self == DIVMR::DIVM_4
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_5`"]
|
|
#[inline]
|
|
pub fn is_divm_5(&self) -> bool {
|
|
*self == DIVMR::DIVM_5
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_6`"]
|
|
#[inline]
|
|
pub fn is_divm_6(&self) -> bool {
|
|
*self == DIVMR::DIVM_6
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVM_7`"]
|
|
#[inline]
|
|
pub fn is_divm_7(&self) -> bool {
|
|
*self == DIVMR::DIVM_7
|
|
}
|
|
}
|
|
#[doc = "Possible values of the field `DIVHS`"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum DIVHSR {
|
|
#[doc = "f(HSMCLK)/1"]
|
|
DIVHS_0,
|
|
#[doc = "f(HSMCLK)/2"]
|
|
DIVHS_1,
|
|
#[doc = "f(HSMCLK)/4"]
|
|
DIVHS_2,
|
|
#[doc = "f(HSMCLK)/8"]
|
|
DIVHS_3,
|
|
#[doc = "f(HSMCLK)/16"]
|
|
DIVHS_4,
|
|
#[doc = "f(HSMCLK)/32"]
|
|
DIVHS_5,
|
|
#[doc = "f(HSMCLK)/64"]
|
|
DIVHS_6,
|
|
#[doc = "f(HSMCLK)/128"]
|
|
DIVHS_7,
|
|
}
|
|
impl DIVHSR {
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u8 {
|
|
match *self {
|
|
DIVHSR::DIVHS_0 => 0,
|
|
DIVHSR::DIVHS_1 => 1,
|
|
DIVHSR::DIVHS_2 => 2,
|
|
DIVHSR::DIVHS_3 => 3,
|
|
DIVHSR::DIVHS_4 => 4,
|
|
DIVHSR::DIVHS_5 => 5,
|
|
DIVHSR::DIVHS_6 => 6,
|
|
DIVHSR::DIVHS_7 => 7,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: u8) -> DIVHSR {
|
|
match value {
|
|
0 => DIVHSR::DIVHS_0,
|
|
1 => DIVHSR::DIVHS_1,
|
|
2 => DIVHSR::DIVHS_2,
|
|
3 => DIVHSR::DIVHS_3,
|
|
4 => DIVHSR::DIVHS_4,
|
|
5 => DIVHSR::DIVHS_5,
|
|
6 => DIVHSR::DIVHS_6,
|
|
7 => DIVHSR::DIVHS_7,
|
|
_ => unreachable!(),
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_0`"]
|
|
#[inline]
|
|
pub fn is_divhs_0(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_1`"]
|
|
#[inline]
|
|
pub fn is_divhs_1(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_1
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_2`"]
|
|
#[inline]
|
|
pub fn is_divhs_2(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_2
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_3`"]
|
|
#[inline]
|
|
pub fn is_divhs_3(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_3
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_4`"]
|
|
#[inline]
|
|
pub fn is_divhs_4(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_4
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_5`"]
|
|
#[inline]
|
|
pub fn is_divhs_5(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_5
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_6`"]
|
|
#[inline]
|
|
pub fn is_divhs_6(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_6
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVHS_7`"]
|
|
#[inline]
|
|
pub fn is_divhs_7(&self) -> bool {
|
|
*self == DIVHSR::DIVHS_7
|
|
}
|
|
}
|
|
#[doc = "Possible values of the field `DIVA`"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum DIVAR {
|
|
#[doc = "f(ACLK)/1"]
|
|
DIVA_0,
|
|
#[doc = "f(ACLK)/2"]
|
|
DIVA_1,
|
|
#[doc = "f(ACLK)/4"]
|
|
DIVA_2,
|
|
#[doc = "f(ACLK)/8"]
|
|
DIVA_3,
|
|
#[doc = "f(ACLK)/16"]
|
|
DIVA_4,
|
|
#[doc = "f(ACLK)/32"]
|
|
DIVA_5,
|
|
#[doc = "f(ACLK)/64"]
|
|
DIVA_6,
|
|
#[doc = "f(ACLK)/128"]
|
|
DIVA_7,
|
|
}
|
|
impl DIVAR {
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u8 {
|
|
match *self {
|
|
DIVAR::DIVA_0 => 0,
|
|
DIVAR::DIVA_1 => 1,
|
|
DIVAR::DIVA_2 => 2,
|
|
DIVAR::DIVA_3 => 3,
|
|
DIVAR::DIVA_4 => 4,
|
|
DIVAR::DIVA_5 => 5,
|
|
DIVAR::DIVA_6 => 6,
|
|
DIVAR::DIVA_7 => 7,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: u8) -> DIVAR {
|
|
match value {
|
|
0 => DIVAR::DIVA_0,
|
|
1 => DIVAR::DIVA_1,
|
|
2 => DIVAR::DIVA_2,
|
|
3 => DIVAR::DIVA_3,
|
|
4 => DIVAR::DIVA_4,
|
|
5 => DIVAR::DIVA_5,
|
|
6 => DIVAR::DIVA_6,
|
|
7 => DIVAR::DIVA_7,
|
|
_ => unreachable!(),
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_0`"]
|
|
#[inline]
|
|
pub fn is_diva_0(&self) -> bool {
|
|
*self == DIVAR::DIVA_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_1`"]
|
|
#[inline]
|
|
pub fn is_diva_1(&self) -> bool {
|
|
*self == DIVAR::DIVA_1
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_2`"]
|
|
#[inline]
|
|
pub fn is_diva_2(&self) -> bool {
|
|
*self == DIVAR::DIVA_2
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_3`"]
|
|
#[inline]
|
|
pub fn is_diva_3(&self) -> bool {
|
|
*self == DIVAR::DIVA_3
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_4`"]
|
|
#[inline]
|
|
pub fn is_diva_4(&self) -> bool {
|
|
*self == DIVAR::DIVA_4
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_5`"]
|
|
#[inline]
|
|
pub fn is_diva_5(&self) -> bool {
|
|
*self == DIVAR::DIVA_5
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_6`"]
|
|
#[inline]
|
|
pub fn is_diva_6(&self) -> bool {
|
|
*self == DIVAR::DIVA_6
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVA_7`"]
|
|
#[inline]
|
|
pub fn is_diva_7(&self) -> bool {
|
|
*self == DIVAR::DIVA_7
|
|
}
|
|
}
|
|
#[doc = "Possible values of the field `DIVS`"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum DIVSR {
|
|
#[doc = "f(SMCLK)/1"]
|
|
DIVS_0,
|
|
#[doc = "f(SMCLK)/2"]
|
|
DIVS_1,
|
|
#[doc = "f(SMCLK)/4"]
|
|
DIVS_2,
|
|
#[doc = "f(SMCLK)/8"]
|
|
DIVS_3,
|
|
#[doc = "f(SMCLK)/16"]
|
|
DIVS_4,
|
|
#[doc = "f(SMCLK)/32"]
|
|
DIVS_5,
|
|
#[doc = "f(SMCLK)/64"]
|
|
DIVS_6,
|
|
#[doc = "f(SMCLK)/128"]
|
|
DIVS_7,
|
|
}
|
|
impl DIVSR {
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u8 {
|
|
match *self {
|
|
DIVSR::DIVS_0 => 0,
|
|
DIVSR::DIVS_1 => 1,
|
|
DIVSR::DIVS_2 => 2,
|
|
DIVSR::DIVS_3 => 3,
|
|
DIVSR::DIVS_4 => 4,
|
|
DIVSR::DIVS_5 => 5,
|
|
DIVSR::DIVS_6 => 6,
|
|
DIVSR::DIVS_7 => 7,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: u8) -> DIVSR {
|
|
match value {
|
|
0 => DIVSR::DIVS_0,
|
|
1 => DIVSR::DIVS_1,
|
|
2 => DIVSR::DIVS_2,
|
|
3 => DIVSR::DIVS_3,
|
|
4 => DIVSR::DIVS_4,
|
|
5 => DIVSR::DIVS_5,
|
|
6 => DIVSR::DIVS_6,
|
|
7 => DIVSR::DIVS_7,
|
|
_ => unreachable!(),
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_0`"]
|
|
#[inline]
|
|
pub fn is_divs_0(&self) -> bool {
|
|
*self == DIVSR::DIVS_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_1`"]
|
|
#[inline]
|
|
pub fn is_divs_1(&self) -> bool {
|
|
*self == DIVSR::DIVS_1
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_2`"]
|
|
#[inline]
|
|
pub fn is_divs_2(&self) -> bool {
|
|
*self == DIVSR::DIVS_2
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_3`"]
|
|
#[inline]
|
|
pub fn is_divs_3(&self) -> bool {
|
|
*self == DIVSR::DIVS_3
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_4`"]
|
|
#[inline]
|
|
pub fn is_divs_4(&self) -> bool {
|
|
*self == DIVSR::DIVS_4
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_5`"]
|
|
#[inline]
|
|
pub fn is_divs_5(&self) -> bool {
|
|
*self == DIVSR::DIVS_5
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_6`"]
|
|
#[inline]
|
|
pub fn is_divs_6(&self) -> bool {
|
|
*self == DIVSR::DIVS_6
|
|
}
|
|
#[doc = "Checks if the value of the field is `DIVS_7`"]
|
|
#[inline]
|
|
pub fn is_divs_7(&self) -> bool {
|
|
*self == DIVSR::DIVS_7
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `SELM`"]
|
|
pub enum SELMW {
|
|
#[doc = "when LFXT available, otherwise REFOCLK"]
|
|
SELM_0,
|
|
#[doc = "`1`"]
|
|
SELM_1,
|
|
#[doc = "`10`"]
|
|
SELM_2,
|
|
#[doc = "`11`"]
|
|
SELM_3,
|
|
#[doc = "`100`"]
|
|
SELM_4,
|
|
#[doc = "when HFXT available, otherwise DCOCLK"]
|
|
SELM_5,
|
|
#[doc = "when HFXT2 available, otherwise DCOCLK"]
|
|
SELM_6,
|
|
#[doc = "for future use. Defaults to DCOCLK. Not recommended for use\r\r\nto ensure future compatibilities."]
|
|
SELM_7,
|
|
}
|
|
impl SELMW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
SELMW::SELM_0 => 0,
|
|
SELMW::SELM_1 => 1,
|
|
SELMW::SELM_2 => 2,
|
|
SELMW::SELM_3 => 3,
|
|
SELMW::SELM_4 => 4,
|
|
SELMW::SELM_5 => 5,
|
|
SELMW::SELM_6 => 6,
|
|
SELMW::SELM_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _SELMW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _SELMW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: SELMW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "when LFXT available, otherwise REFOCLK"]
|
|
#[inline]
|
|
pub fn selm_0(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_0)
|
|
}
|
|
#[doc = "`1`"]
|
|
#[inline]
|
|
pub fn selm_1(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_1)
|
|
}
|
|
#[doc = "`10`"]
|
|
#[inline]
|
|
pub fn selm_2(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_2)
|
|
}
|
|
#[doc = "`11`"]
|
|
#[inline]
|
|
pub fn selm_3(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_3)
|
|
}
|
|
#[doc = "`100`"]
|
|
#[inline]
|
|
pub fn selm_4(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_4)
|
|
}
|
|
#[doc = "when HFXT available, otherwise DCOCLK"]
|
|
#[inline]
|
|
pub fn selm_5(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_5)
|
|
}
|
|
#[doc = "when HFXT2 available, otherwise DCOCLK"]
|
|
#[inline]
|
|
pub fn selm_6(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_6)
|
|
}
|
|
#[doc = "for future use. Defaults to DCOCLK. Not recommended for use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn selm_7(self) -> &'a mut W {
|
|
self.variant(SELMW::SELM_7)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 0;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `SELS`"]
|
|
pub enum SELSW {
|
|
#[doc = "when LFXT available, otherwise REFOCLK"]
|
|
SELS_0,
|
|
#[doc = "`1`"]
|
|
SELS_1,
|
|
#[doc = "`10`"]
|
|
SELS_2,
|
|
#[doc = "`11`"]
|
|
SELS_3,
|
|
#[doc = "`100`"]
|
|
SELS_4,
|
|
#[doc = "when HFXT available, otherwise DCOCLK"]
|
|
SELS_5,
|
|
#[doc = "when HFXT2 available, otherwise DCOCLK"]
|
|
SELS_6,
|
|
#[doc = "for furture use. Defaults to DCOCLK. Do not use to ensure future compatibilities."]
|
|
SELS_7,
|
|
}
|
|
impl SELSW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
SELSW::SELS_0 => 0,
|
|
SELSW::SELS_1 => 1,
|
|
SELSW::SELS_2 => 2,
|
|
SELSW::SELS_3 => 3,
|
|
SELSW::SELS_4 => 4,
|
|
SELSW::SELS_5 => 5,
|
|
SELSW::SELS_6 => 6,
|
|
SELSW::SELS_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _SELSW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _SELSW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: SELSW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "when LFXT available, otherwise REFOCLK"]
|
|
#[inline]
|
|
pub fn sels_0(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_0)
|
|
}
|
|
#[doc = "`1`"]
|
|
#[inline]
|
|
pub fn sels_1(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_1)
|
|
}
|
|
#[doc = "`10`"]
|
|
#[inline]
|
|
pub fn sels_2(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_2)
|
|
}
|
|
#[doc = "`11`"]
|
|
#[inline]
|
|
pub fn sels_3(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_3)
|
|
}
|
|
#[doc = "`100`"]
|
|
#[inline]
|
|
pub fn sels_4(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_4)
|
|
}
|
|
#[doc = "when HFXT available, otherwise DCOCLK"]
|
|
#[inline]
|
|
pub fn sels_5(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_5)
|
|
}
|
|
#[doc = "when HFXT2 available, otherwise DCOCLK"]
|
|
#[inline]
|
|
pub fn sels_6(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_6)
|
|
}
|
|
#[doc = "for furture use. Defaults to DCOCLK. Do not use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn sels_7(self) -> &'a mut W {
|
|
self.variant(SELSW::SELS_7)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 4;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `SELA`"]
|
|
pub enum SELAW {
|
|
#[doc = "when LFXT available, otherwise REFOCLK"]
|
|
SELA_0,
|
|
#[doc = "`1`"]
|
|
SELA_1,
|
|
#[doc = "`10`"]
|
|
SELA_2,
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
|
|
SELA_3,
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
|
|
SELA_4,
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
|
|
SELA_5,
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
|
|
SELA_6,
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended\r\r\nfor use to ensure future compatibilities."]
|
|
SELA_7,
|
|
}
|
|
impl SELAW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
SELAW::SELA_0 => 0,
|
|
SELAW::SELA_1 => 1,
|
|
SELAW::SELA_2 => 2,
|
|
SELAW::SELA_3 => 3,
|
|
SELAW::SELA_4 => 4,
|
|
SELAW::SELA_5 => 5,
|
|
SELAW::SELA_6 => 6,
|
|
SELAW::SELA_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _SELAW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _SELAW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: SELAW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "when LFXT available, otherwise REFOCLK"]
|
|
#[inline]
|
|
pub fn sela_0(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_0)
|
|
}
|
|
#[doc = "`1`"]
|
|
#[inline]
|
|
pub fn sela_1(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_1)
|
|
}
|
|
#[doc = "`10`"]
|
|
#[inline]
|
|
pub fn sela_2(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_2)
|
|
}
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn sela_3(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_3)
|
|
}
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn sela_4(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_4)
|
|
}
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn sela_5(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_5)
|
|
}
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn sela_6(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_6)
|
|
}
|
|
#[doc = "for future use. Defaults to REFOCLK. Not recommended for use to ensure future compatibilities."]
|
|
#[inline]
|
|
pub fn sela_7(self) -> &'a mut W {
|
|
self.variant(SELAW::SELA_7)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 8;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `SELB`"]
|
|
pub enum SELBW {
|
|
#[doc = "LFXTCLK"]
|
|
SELB_0,
|
|
#[doc = "REFOCLK"]
|
|
SELB_1,
|
|
}
|
|
impl SELBW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
SELBW::SELB_0 => false,
|
|
SELBW::SELB_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _SELBW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _SELBW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: SELBW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "LFXTCLK"]
|
|
#[inline]
|
|
pub fn selb_0(self) -> &'a mut W {
|
|
self.variant(SELBW::SELB_0)
|
|
}
|
|
#[doc = "REFOCLK"]
|
|
#[inline]
|
|
pub fn selb_1(self) -> &'a mut W {
|
|
self.variant(SELBW::SELB_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 12;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `DIVM`"]
|
|
pub enum DIVMW {
|
|
#[doc = "f(MCLK)/1"]
|
|
DIVM_0,
|
|
#[doc = "f(MCLK)/2"]
|
|
DIVM_1,
|
|
#[doc = "f(MCLK)/4"]
|
|
DIVM_2,
|
|
#[doc = "f(MCLK)/8"]
|
|
DIVM_3,
|
|
#[doc = "f(MCLK)/16"]
|
|
DIVM_4,
|
|
#[doc = "f(MCLK)/32"]
|
|
DIVM_5,
|
|
#[doc = "f(MCLK)/64"]
|
|
DIVM_6,
|
|
#[doc = "f(MCLK)/128"]
|
|
DIVM_7,
|
|
}
|
|
impl DIVMW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
DIVMW::DIVM_0 => 0,
|
|
DIVMW::DIVM_1 => 1,
|
|
DIVMW::DIVM_2 => 2,
|
|
DIVMW::DIVM_3 => 3,
|
|
DIVMW::DIVM_4 => 4,
|
|
DIVMW::DIVM_5 => 5,
|
|
DIVMW::DIVM_6 => 6,
|
|
DIVMW::DIVM_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _DIVMW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _DIVMW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: DIVMW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "f(MCLK)/1"]
|
|
#[inline]
|
|
pub fn divm_0(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_0)
|
|
}
|
|
#[doc = "f(MCLK)/2"]
|
|
#[inline]
|
|
pub fn divm_1(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_1)
|
|
}
|
|
#[doc = "f(MCLK)/4"]
|
|
#[inline]
|
|
pub fn divm_2(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_2)
|
|
}
|
|
#[doc = "f(MCLK)/8"]
|
|
#[inline]
|
|
pub fn divm_3(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_3)
|
|
}
|
|
#[doc = "f(MCLK)/16"]
|
|
#[inline]
|
|
pub fn divm_4(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_4)
|
|
}
|
|
#[doc = "f(MCLK)/32"]
|
|
#[inline]
|
|
pub fn divm_5(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_5)
|
|
}
|
|
#[doc = "f(MCLK)/64"]
|
|
#[inline]
|
|
pub fn divm_6(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_6)
|
|
}
|
|
#[doc = "f(MCLK)/128"]
|
|
#[inline]
|
|
pub fn divm_7(self) -> &'a mut W {
|
|
self.variant(DIVMW::DIVM_7)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 16;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `DIVHS`"]
|
|
pub enum DIVHSW {
|
|
#[doc = "f(HSMCLK)/1"]
|
|
DIVHS_0,
|
|
#[doc = "f(HSMCLK)/2"]
|
|
DIVHS_1,
|
|
#[doc = "f(HSMCLK)/4"]
|
|
DIVHS_2,
|
|
#[doc = "f(HSMCLK)/8"]
|
|
DIVHS_3,
|
|
#[doc = "f(HSMCLK)/16"]
|
|
DIVHS_4,
|
|
#[doc = "f(HSMCLK)/32"]
|
|
DIVHS_5,
|
|
#[doc = "f(HSMCLK)/64"]
|
|
DIVHS_6,
|
|
#[doc = "f(HSMCLK)/128"]
|
|
DIVHS_7,
|
|
}
|
|
impl DIVHSW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
DIVHSW::DIVHS_0 => 0,
|
|
DIVHSW::DIVHS_1 => 1,
|
|
DIVHSW::DIVHS_2 => 2,
|
|
DIVHSW::DIVHS_3 => 3,
|
|
DIVHSW::DIVHS_4 => 4,
|
|
DIVHSW::DIVHS_5 => 5,
|
|
DIVHSW::DIVHS_6 => 6,
|
|
DIVHSW::DIVHS_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _DIVHSW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _DIVHSW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: DIVHSW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "f(HSMCLK)/1"]
|
|
#[inline]
|
|
pub fn divhs_0(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_0)
|
|
}
|
|
#[doc = "f(HSMCLK)/2"]
|
|
#[inline]
|
|
pub fn divhs_1(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_1)
|
|
}
|
|
#[doc = "f(HSMCLK)/4"]
|
|
#[inline]
|
|
pub fn divhs_2(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_2)
|
|
}
|
|
#[doc = "f(HSMCLK)/8"]
|
|
#[inline]
|
|
pub fn divhs_3(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_3)
|
|
}
|
|
#[doc = "f(HSMCLK)/16"]
|
|
#[inline]
|
|
pub fn divhs_4(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_4)
|
|
}
|
|
#[doc = "f(HSMCLK)/32"]
|
|
#[inline]
|
|
pub fn divhs_5(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_5)
|
|
}
|
|
#[doc = "f(HSMCLK)/64"]
|
|
#[inline]
|
|
pub fn divhs_6(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_6)
|
|
}
|
|
#[doc = "f(HSMCLK)/128"]
|
|
#[inline]
|
|
pub fn divhs_7(self) -> &'a mut W {
|
|
self.variant(DIVHSW::DIVHS_7)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 20;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `DIVA`"]
|
|
pub enum DIVAW {
|
|
#[doc = "f(ACLK)/1"]
|
|
DIVA_0,
|
|
#[doc = "f(ACLK)/2"]
|
|
DIVA_1,
|
|
#[doc = "f(ACLK)/4"]
|
|
DIVA_2,
|
|
#[doc = "f(ACLK)/8"]
|
|
DIVA_3,
|
|
#[doc = "f(ACLK)/16"]
|
|
DIVA_4,
|
|
#[doc = "f(ACLK)/32"]
|
|
DIVA_5,
|
|
#[doc = "f(ACLK)/64"]
|
|
DIVA_6,
|
|
#[doc = "f(ACLK)/128"]
|
|
DIVA_7,
|
|
}
|
|
impl DIVAW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
DIVAW::DIVA_0 => 0,
|
|
DIVAW::DIVA_1 => 1,
|
|
DIVAW::DIVA_2 => 2,
|
|
DIVAW::DIVA_3 => 3,
|
|
DIVAW::DIVA_4 => 4,
|
|
DIVAW::DIVA_5 => 5,
|
|
DIVAW::DIVA_6 => 6,
|
|
DIVAW::DIVA_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _DIVAW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _DIVAW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: DIVAW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "f(ACLK)/1"]
|
|
#[inline]
|
|
pub fn diva_0(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_0)
|
|
}
|
|
#[doc = "f(ACLK)/2"]
|
|
#[inline]
|
|
pub fn diva_1(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_1)
|
|
}
|
|
#[doc = "f(ACLK)/4"]
|
|
#[inline]
|
|
pub fn diva_2(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_2)
|
|
}
|
|
#[doc = "f(ACLK)/8"]
|
|
#[inline]
|
|
pub fn diva_3(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_3)
|
|
}
|
|
#[doc = "f(ACLK)/16"]
|
|
#[inline]
|
|
pub fn diva_4(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_4)
|
|
}
|
|
#[doc = "f(ACLK)/32"]
|
|
#[inline]
|
|
pub fn diva_5(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_5)
|
|
}
|
|
#[doc = "f(ACLK)/64"]
|
|
#[inline]
|
|
pub fn diva_6(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_6)
|
|
}
|
|
#[doc = "f(ACLK)/128"]
|
|
#[inline]
|
|
pub fn diva_7(self) -> &'a mut W {
|
|
self.variant(DIVAW::DIVA_7)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 24;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `DIVS`"]
|
|
pub enum DIVSW {
|
|
#[doc = "f(SMCLK)/1"]
|
|
DIVS_0,
|
|
#[doc = "f(SMCLK)/2"]
|
|
DIVS_1,
|
|
#[doc = "f(SMCLK)/4"]
|
|
DIVS_2,
|
|
#[doc = "f(SMCLK)/8"]
|
|
DIVS_3,
|
|
#[doc = "f(SMCLK)/16"]
|
|
DIVS_4,
|
|
#[doc = "f(SMCLK)/32"]
|
|
DIVS_5,
|
|
#[doc = "f(SMCLK)/64"]
|
|
DIVS_6,
|
|
#[doc = "f(SMCLK)/128"]
|
|
DIVS_7,
|
|
}
|
|
impl DIVSW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
DIVSW::DIVS_0 => 0,
|
|
DIVSW::DIVS_1 => 1,
|
|
DIVSW::DIVS_2 => 2,
|
|
DIVSW::DIVS_3 => 3,
|
|
DIVSW::DIVS_4 => 4,
|
|
DIVSW::DIVS_5 => 5,
|
|
DIVSW::DIVS_6 => 6,
|
|
DIVSW::DIVS_7 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _DIVSW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _DIVSW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: DIVSW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "f(SMCLK)/1"]
|
|
#[inline]
|
|
pub fn divs_0(self) -> &'a mut W {
|
|
self.variant(DIVSW::DIVS_0)
|
|
}
|
|
#[doc = "f(SMCLK)/2"]
|
|
#[inline]
|
|
pub fn divs_1(self) -> &'a mut W {
|
|
self.variant(DIVSW::DIVS_1)
|
|
}
|
|
#[doc = "f(SMCLK)/4"]
|
|
#[inline]
|
|
pub fn divs_2(self) -> &'a mut W {
|
|
self.variant(DIVSW::DIVS_2)
|
|
}
|
|
#[doc = "f(SMCLK)/8"]
|
|
#[inline]
|
|
pub fn divs_3(self) -> &'a mut W {
|
|
self.variant(DIVSW::DIVS_3)
|
|
}
|
|
#[doc = "f(SMCLK)/16"]
|
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#[inline]
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pub fn divs_4(self) -> &'a mut W {
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self.variant(DIVSW::DIVS_4)
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}
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#[doc = "f(SMCLK)/32"]
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#[inline]
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pub fn divs_5(self) -> &'a mut W {
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self.variant(DIVSW::DIVS_5)
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}
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#[doc = "f(SMCLK)/64"]
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#[inline]
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pub fn divs_6(self) -> &'a mut W {
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self.variant(DIVSW::DIVS_6)
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}
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#[doc = "f(SMCLK)/128"]
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#[inline]
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pub fn divs_7(self) -> &'a mut W {
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self.variant(DIVSW::DIVS_7)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 7;
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const OFFSET: u8 = 28;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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#[doc = "Bits 0:2 - Selects the MCLK source"]
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#[inline]
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pub fn selm(&self) -> SELMR {
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SELMR::_from({
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const MASK: u8 = 7;
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const OFFSET: u8 = 0;
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((self.bits >> OFFSET) & MASK as u32) as u8
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})
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}
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|
#[doc = "Bits 4:6 - Selects the SMCLK and HSMCLK source"]
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#[inline]
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pub fn sels(&self) -> SELSR {
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SELSR::_from({
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const MASK: u8 = 7;
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const OFFSET: u8 = 4;
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((self.bits >> OFFSET) & MASK as u32) as u8
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})
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}
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#[doc = "Bits 8:10 - Selects the ACLK source"]
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|
#[inline]
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pub fn sela(&self) -> SELAR {
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|
SELAR::_from({
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|
const MASK: u8 = 7;
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|
const OFFSET: u8 = 8;
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|
((self.bits >> OFFSET) & MASK as u32) as u8
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})
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}
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#[doc = "Bit 12 - Selects the BCLK source"]
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|
#[inline]
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|
pub fn selb(&self) -> SELBR {
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|
SELBR::_from({
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|
const MASK: bool = true;
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|
const OFFSET: u8 = 12;
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((self.bits >> OFFSET) & MASK as u32) != 0
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|
})
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|
}
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|
#[doc = "Bits 16:18 - MCLK source divider"]
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|
#[inline]
|
|
pub fn divm(&self) -> DIVMR {
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|
DIVMR::_from({
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|
const MASK: u8 = 7;
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|
const OFFSET: u8 = 16;
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|
((self.bits >> OFFSET) & MASK as u32) as u8
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|
})
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|
}
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|
#[doc = "Bits 20:22 - HSMCLK source divider"]
|
|
#[inline]
|
|
pub fn divhs(&self) -> DIVHSR {
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|
DIVHSR::_from({
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 20;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
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|
})
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|
}
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|
#[doc = "Bits 24:26 - ACLK source divider"]
|
|
#[inline]
|
|
pub fn diva(&self) -> DIVAR {
|
|
DIVAR::_from({
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 24;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
|
})
|
|
}
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|
#[doc = "Bits 28:30 - SMCLK source divider"]
|
|
#[inline]
|
|
pub fn divs(&self) -> DIVSR {
|
|
DIVSR::_from({
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 28;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
|
})
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = r" Reset value of the register"]
|
|
#[inline]
|
|
pub fn reset_value() -> W {
|
|
W { bits: 51 }
|
|
}
|
|
#[doc = r" Writes raw bits to the register"]
|
|
#[inline]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.bits = bits;
|
|
self
|
|
}
|
|
#[doc = "Bits 0:2 - Selects the MCLK source"]
|
|
#[inline]
|
|
pub fn selm(&mut self) -> _SELMW {
|
|
_SELMW { w: self }
|
|
}
|
|
#[doc = "Bits 4:6 - Selects the SMCLK and HSMCLK source"]
|
|
#[inline]
|
|
pub fn sels(&mut self) -> _SELSW {
|
|
_SELSW { w: self }
|
|
}
|
|
#[doc = "Bits 8:10 - Selects the ACLK source"]
|
|
#[inline]
|
|
pub fn sela(&mut self) -> _SELAW {
|
|
_SELAW { w: self }
|
|
}
|
|
#[doc = "Bit 12 - Selects the BCLK source"]
|
|
#[inline]
|
|
pub fn selb(&mut self) -> _SELBW {
|
|
_SELBW { w: self }
|
|
}
|
|
#[doc = "Bits 16:18 - MCLK source divider"]
|
|
#[inline]
|
|
pub fn divm(&mut self) -> _DIVMW {
|
|
_DIVMW { w: self }
|
|
}
|
|
#[doc = "Bits 20:22 - HSMCLK source divider"]
|
|
#[inline]
|
|
pub fn divhs(&mut self) -> _DIVHSW {
|
|
_DIVHSW { w: self }
|
|
}
|
|
#[doc = "Bits 24:26 - ACLK source divider"]
|
|
#[inline]
|
|
pub fn diva(&mut self) -> _DIVAW {
|
|
_DIVAW { w: self }
|
|
}
|
|
#[doc = "Bits 28:30 - SMCLK source divider"]
|
|
#[inline]
|
|
pub fn divs(&mut self) -> _DIVSW {
|
|
_DIVSW { w: self }
|
|
}
|
|
}
|