1017 lines
28 KiB
Rust
1017 lines
28 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::CSCLKEN {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `ACLK_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ACLK_ENR {
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#[doc = "ACLK disabled regardless of conditional clock requests"]
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ACLK_EN_0,
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#[doc = "ACLK enabled based on any conditional clock requests"]
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ACLK_EN_1,
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}
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impl ACLK_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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ACLK_ENR::ACLK_EN_0 => false,
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ACLK_ENR::ACLK_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> ACLK_ENR {
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match value {
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false => ACLK_ENR::ACLK_EN_0,
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true => ACLK_ENR::ACLK_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `ACLK_EN_0`"]
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#[inline]
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pub fn is_aclk_en_0(&self) -> bool {
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*self == ACLK_ENR::ACLK_EN_0
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}
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#[doc = "Checks if the value of the field is `ACLK_EN_1`"]
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#[inline]
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pub fn is_aclk_en_1(&self) -> bool {
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*self == ACLK_ENR::ACLK_EN_1
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}
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}
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#[doc = "Possible values of the field `MCLK_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum MCLK_ENR {
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#[doc = "MCLK disabled regardless of conditional clock requests"]
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MCLK_EN_0,
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#[doc = "MCLK enabled based on any conditional clock requests"]
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MCLK_EN_1,
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}
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impl MCLK_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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MCLK_ENR::MCLK_EN_0 => false,
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MCLK_ENR::MCLK_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> MCLK_ENR {
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match value {
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false => MCLK_ENR::MCLK_EN_0,
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true => MCLK_ENR::MCLK_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `MCLK_EN_0`"]
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#[inline]
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pub fn is_mclk_en_0(&self) -> bool {
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*self == MCLK_ENR::MCLK_EN_0
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}
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#[doc = "Checks if the value of the field is `MCLK_EN_1`"]
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#[inline]
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pub fn is_mclk_en_1(&self) -> bool {
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*self == MCLK_ENR::MCLK_EN_1
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}
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}
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#[doc = "Possible values of the field `HSMCLK_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum HSMCLK_ENR {
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#[doc = "HSMCLK disabled regardless of conditional clock requests"]
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HSMCLK_EN_0,
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#[doc = "HSMCLK enabled based on any conditional clock requests"]
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HSMCLK_EN_1,
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}
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impl HSMCLK_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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HSMCLK_ENR::HSMCLK_EN_0 => false,
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HSMCLK_ENR::HSMCLK_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> HSMCLK_ENR {
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match value {
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false => HSMCLK_ENR::HSMCLK_EN_0,
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true => HSMCLK_ENR::HSMCLK_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `HSMCLK_EN_0`"]
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#[inline]
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pub fn is_hsmclk_en_0(&self) -> bool {
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*self == HSMCLK_ENR::HSMCLK_EN_0
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}
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#[doc = "Checks if the value of the field is `HSMCLK_EN_1`"]
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#[inline]
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pub fn is_hsmclk_en_1(&self) -> bool {
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*self == HSMCLK_ENR::HSMCLK_EN_1
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}
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}
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#[doc = "Possible values of the field `SMCLK_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SMCLK_ENR {
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#[doc = "SMCLK disabled regardless of conditional clock requests."]
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SMCLK_EN_0,
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#[doc = "SMCLK enabled based on any conditional clock requests"]
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SMCLK_EN_1,
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}
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impl SMCLK_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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SMCLK_ENR::SMCLK_EN_0 => false,
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SMCLK_ENR::SMCLK_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> SMCLK_ENR {
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match value {
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false => SMCLK_ENR::SMCLK_EN_0,
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true => SMCLK_ENR::SMCLK_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `SMCLK_EN_0`"]
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#[inline]
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pub fn is_smclk_en_0(&self) -> bool {
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*self == SMCLK_ENR::SMCLK_EN_0
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}
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#[doc = "Checks if the value of the field is `SMCLK_EN_1`"]
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#[inline]
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pub fn is_smclk_en_1(&self) -> bool {
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*self == SMCLK_ENR::SMCLK_EN_1
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}
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}
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#[doc = "Possible values of the field `VLO_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum VLO_ENR {
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#[doc = "VLO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK."]
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VLO_EN_0,
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#[doc = "VLO is on"]
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VLO_EN_1,
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}
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impl VLO_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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VLO_ENR::VLO_EN_0 => false,
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VLO_ENR::VLO_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> VLO_ENR {
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match value {
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false => VLO_ENR::VLO_EN_0,
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true => VLO_ENR::VLO_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `VLO_EN_0`"]
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#[inline]
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pub fn is_vlo_en_0(&self) -> bool {
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*self == VLO_ENR::VLO_EN_0
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}
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#[doc = "Checks if the value of the field is `VLO_EN_1`"]
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#[inline]
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pub fn is_vlo_en_1(&self) -> bool {
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*self == VLO_ENR::VLO_EN_1
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}
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}
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#[doc = "Possible values of the field `REFO_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum REFO_ENR {
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#[doc = "REFO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK"]
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REFO_EN_0,
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#[doc = "REFO is on"]
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REFO_EN_1,
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}
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impl REFO_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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REFO_ENR::REFO_EN_0 => false,
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REFO_ENR::REFO_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> REFO_ENR {
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match value {
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false => REFO_ENR::REFO_EN_0,
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true => REFO_ENR::REFO_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `REFO_EN_0`"]
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#[inline]
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pub fn is_refo_en_0(&self) -> bool {
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*self == REFO_ENR::REFO_EN_0
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}
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#[doc = "Checks if the value of the field is `REFO_EN_1`"]
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#[inline]
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pub fn is_refo_en_1(&self) -> bool {
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*self == REFO_ENR::REFO_EN_1
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}
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}
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#[doc = "Possible values of the field `MODOSC_EN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum MODOSC_ENR {
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#[doc = "MODOSC is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK"]
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MODOSC_EN_0,
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#[doc = "MODOSC is on"]
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MODOSC_EN_1,
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}
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impl MODOSC_ENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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MODOSC_ENR::MODOSC_EN_0 => false,
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MODOSC_ENR::MODOSC_EN_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> MODOSC_ENR {
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match value {
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false => MODOSC_ENR::MODOSC_EN_0,
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true => MODOSC_ENR::MODOSC_EN_1,
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}
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}
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#[doc = "Checks if the value of the field is `MODOSC_EN_0`"]
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#[inline]
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pub fn is_modosc_en_0(&self) -> bool {
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*self == MODOSC_ENR::MODOSC_EN_0
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}
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#[doc = "Checks if the value of the field is `MODOSC_EN_1`"]
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#[inline]
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pub fn is_modosc_en_1(&self) -> bool {
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*self == MODOSC_ENR::MODOSC_EN_1
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}
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}
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|
#[doc = "Possible values of the field `REFOFSEL`"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum REFOFSELR {
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|
#[doc = "32 kHz"]
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REFOFSEL_0,
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#[doc = "128 kHz"]
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REFOFSEL_1,
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}
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impl REFOFSELR {
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|
#[doc = r" Returns `true` if the bit is clear (0)"]
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|
#[inline]
|
|
pub fn bit_is_clear(&self) -> bool {
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|
!self.bit()
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|
}
|
|
#[doc = r" Returns `true` if the bit is set (1)"]
|
|
#[inline]
|
|
pub fn bit_is_set(&self) -> bool {
|
|
self.bit()
|
|
}
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bit(&self) -> bool {
|
|
match *self {
|
|
REFOFSELR::REFOFSEL_0 => false,
|
|
REFOFSELR::REFOFSEL_1 => true,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: bool) -> REFOFSELR {
|
|
match value {
|
|
false => REFOFSELR::REFOFSEL_0,
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|
true => REFOFSELR::REFOFSEL_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `REFOFSEL_0`"]
|
|
#[inline]
|
|
pub fn is_refofsel_0(&self) -> bool {
|
|
*self == REFOFSELR::REFOFSEL_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `REFOFSEL_1`"]
|
|
#[inline]
|
|
pub fn is_refofsel_1(&self) -> bool {
|
|
*self == REFOFSELR::REFOFSEL_1
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `ACLK_EN`"]
|
|
pub enum ACLK_ENW {
|
|
#[doc = "ACLK disabled regardless of conditional clock requests"]
|
|
ACLK_EN_0,
|
|
#[doc = "ACLK enabled based on any conditional clock requests"]
|
|
ACLK_EN_1,
|
|
}
|
|
impl ACLK_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
ACLK_ENW::ACLK_EN_0 => false,
|
|
ACLK_ENW::ACLK_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _ACLK_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _ACLK_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: ACLK_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "ACLK disabled regardless of conditional clock requests"]
|
|
#[inline]
|
|
pub fn aclk_en_0(self) -> &'a mut W {
|
|
self.variant(ACLK_ENW::ACLK_EN_0)
|
|
}
|
|
#[doc = "ACLK enabled based on any conditional clock requests"]
|
|
#[inline]
|
|
pub fn aclk_en_1(self) -> &'a mut W {
|
|
self.variant(ACLK_ENW::ACLK_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 0;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `MCLK_EN`"]
|
|
pub enum MCLK_ENW {
|
|
#[doc = "MCLK disabled regardless of conditional clock requests"]
|
|
MCLK_EN_0,
|
|
#[doc = "MCLK enabled based on any conditional clock requests"]
|
|
MCLK_EN_1,
|
|
}
|
|
impl MCLK_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
MCLK_ENW::MCLK_EN_0 => false,
|
|
MCLK_ENW::MCLK_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _MCLK_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _MCLK_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: MCLK_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "MCLK disabled regardless of conditional clock requests"]
|
|
#[inline]
|
|
pub fn mclk_en_0(self) -> &'a mut W {
|
|
self.variant(MCLK_ENW::MCLK_EN_0)
|
|
}
|
|
#[doc = "MCLK enabled based on any conditional clock requests"]
|
|
#[inline]
|
|
pub fn mclk_en_1(self) -> &'a mut W {
|
|
self.variant(MCLK_ENW::MCLK_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 1;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `HSMCLK_EN`"]
|
|
pub enum HSMCLK_ENW {
|
|
#[doc = "HSMCLK disabled regardless of conditional clock requests"]
|
|
HSMCLK_EN_0,
|
|
#[doc = "HSMCLK enabled based on any conditional clock requests"]
|
|
HSMCLK_EN_1,
|
|
}
|
|
impl HSMCLK_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
HSMCLK_ENW::HSMCLK_EN_0 => false,
|
|
HSMCLK_ENW::HSMCLK_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _HSMCLK_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _HSMCLK_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: HSMCLK_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "HSMCLK disabled regardless of conditional clock requests"]
|
|
#[inline]
|
|
pub fn hsmclk_en_0(self) -> &'a mut W {
|
|
self.variant(HSMCLK_ENW::HSMCLK_EN_0)
|
|
}
|
|
#[doc = "HSMCLK enabled based on any conditional clock requests"]
|
|
#[inline]
|
|
pub fn hsmclk_en_1(self) -> &'a mut W {
|
|
self.variant(HSMCLK_ENW::HSMCLK_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 2;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `SMCLK_EN`"]
|
|
pub enum SMCLK_ENW {
|
|
#[doc = "SMCLK disabled regardless of conditional clock requests."]
|
|
SMCLK_EN_0,
|
|
#[doc = "SMCLK enabled based on any conditional clock requests"]
|
|
SMCLK_EN_1,
|
|
}
|
|
impl SMCLK_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
SMCLK_ENW::SMCLK_EN_0 => false,
|
|
SMCLK_ENW::SMCLK_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _SMCLK_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _SMCLK_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: SMCLK_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "SMCLK disabled regardless of conditional clock requests."]
|
|
#[inline]
|
|
pub fn smclk_en_0(self) -> &'a mut W {
|
|
self.variant(SMCLK_ENW::SMCLK_EN_0)
|
|
}
|
|
#[doc = "SMCLK enabled based on any conditional clock requests"]
|
|
#[inline]
|
|
pub fn smclk_en_1(self) -> &'a mut W {
|
|
self.variant(SMCLK_ENW::SMCLK_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 3;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `VLO_EN`"]
|
|
pub enum VLO_ENW {
|
|
#[doc = "VLO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK."]
|
|
VLO_EN_0,
|
|
#[doc = "VLO is on"]
|
|
VLO_EN_1,
|
|
}
|
|
impl VLO_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
VLO_ENW::VLO_EN_0 => false,
|
|
VLO_ENW::VLO_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _VLO_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _VLO_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: VLO_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "VLO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK."]
|
|
#[inline]
|
|
pub fn vlo_en_0(self) -> &'a mut W {
|
|
self.variant(VLO_ENW::VLO_EN_0)
|
|
}
|
|
#[doc = "VLO is on"]
|
|
#[inline]
|
|
pub fn vlo_en_1(self) -> &'a mut W {
|
|
self.variant(VLO_ENW::VLO_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 8;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `REFO_EN`"]
|
|
pub enum REFO_ENW {
|
|
#[doc = "REFO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK"]
|
|
REFO_EN_0,
|
|
#[doc = "REFO is on"]
|
|
REFO_EN_1,
|
|
}
|
|
impl REFO_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
REFO_ENW::REFO_EN_0 => false,
|
|
REFO_ENW::REFO_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _REFO_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _REFO_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: REFO_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "REFO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK"]
|
|
#[inline]
|
|
pub fn refo_en_0(self) -> &'a mut W {
|
|
self.variant(REFO_ENW::REFO_EN_0)
|
|
}
|
|
#[doc = "REFO is on"]
|
|
#[inline]
|
|
pub fn refo_en_1(self) -> &'a mut W {
|
|
self.variant(REFO_ENW::REFO_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 9;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `MODOSC_EN`"]
|
|
pub enum MODOSC_ENW {
|
|
#[doc = "MODOSC is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK"]
|
|
MODOSC_EN_0,
|
|
#[doc = "MODOSC is on"]
|
|
MODOSC_EN_1,
|
|
}
|
|
impl MODOSC_ENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
MODOSC_ENW::MODOSC_EN_0 => false,
|
|
MODOSC_ENW::MODOSC_EN_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _MODOSC_ENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _MODOSC_ENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: MODOSC_ENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "MODOSC is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK"]
|
|
#[inline]
|
|
pub fn modosc_en_0(self) -> &'a mut W {
|
|
self.variant(MODOSC_ENW::MODOSC_EN_0)
|
|
}
|
|
#[doc = "MODOSC is on"]
|
|
#[inline]
|
|
pub fn modosc_en_1(self) -> &'a mut W {
|
|
self.variant(MODOSC_ENW::MODOSC_EN_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 10;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `REFOFSEL`"]
|
|
pub enum REFOFSELW {
|
|
#[doc = "32 kHz"]
|
|
REFOFSEL_0,
|
|
#[doc = "128 kHz"]
|
|
REFOFSEL_1,
|
|
}
|
|
impl REFOFSELW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
REFOFSELW::REFOFSEL_0 => false,
|
|
REFOFSELW::REFOFSEL_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _REFOFSELW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _REFOFSELW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: REFOFSELW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "32 kHz"]
|
|
#[inline]
|
|
pub fn refofsel_0(self) -> &'a mut W {
|
|
self.variant(REFOFSELW::REFOFSEL_0)
|
|
}
|
|
#[doc = "128 kHz"]
|
|
#[inline]
|
|
pub fn refofsel_1(self) -> &'a mut W {
|
|
self.variant(REFOFSELW::REFOFSEL_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 15;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = r" Value of the register as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u32 {
|
|
self.bits
|
|
}
|
|
#[doc = "Bit 0 - ACLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn aclk_en(&self) -> ACLK_ENR {
|
|
ACLK_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 0;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 1 - MCLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn mclk_en(&self) -> MCLK_ENR {
|
|
MCLK_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 1;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 2 - HSMCLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn hsmclk_en(&self) -> HSMCLK_ENR {
|
|
HSMCLK_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 2;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 3 - SMCLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn smclk_en(&self) -> SMCLK_ENR {
|
|
SMCLK_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 3;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 8 - Turns on the VLO oscillator"]
|
|
#[inline]
|
|
pub fn vlo_en(&self) -> VLO_ENR {
|
|
VLO_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 8;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 9 - Turns on the REFO oscillator"]
|
|
#[inline]
|
|
pub fn refo_en(&self) -> REFO_ENR {
|
|
REFO_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 9;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 10 - Turns on the MODOSC oscillator"]
|
|
#[inline]
|
|
pub fn modosc_en(&self) -> MODOSC_ENR {
|
|
MODOSC_ENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 10;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 15 - Selects REFO nominal frequency"]
|
|
#[inline]
|
|
pub fn refofsel(&self) -> REFOFSELR {
|
|
REFOFSELR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 15;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = r" Reset value of the register"]
|
|
#[inline]
|
|
pub fn reset_value() -> W {
|
|
W { bits: 15 }
|
|
}
|
|
#[doc = r" Writes raw bits to the register"]
|
|
#[inline]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.bits = bits;
|
|
self
|
|
}
|
|
#[doc = "Bit 0 - ACLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn aclk_en(&mut self) -> _ACLK_ENW {
|
|
_ACLK_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 1 - MCLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn mclk_en(&mut self) -> _MCLK_ENW {
|
|
_MCLK_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 2 - HSMCLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn hsmclk_en(&mut self) -> _HSMCLK_ENW {
|
|
_HSMCLK_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 3 - SMCLK system clock conditional request enable"]
|
|
#[inline]
|
|
pub fn smclk_en(&mut self) -> _SMCLK_ENW {
|
|
_SMCLK_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 8 - Turns on the VLO oscillator"]
|
|
#[inline]
|
|
pub fn vlo_en(&mut self) -> _VLO_ENW {
|
|
_VLO_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 9 - Turns on the REFO oscillator"]
|
|
#[inline]
|
|
pub fn refo_en(&mut self) -> _REFO_ENW {
|
|
_REFO_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 10 - Turns on the MODOSC oscillator"]
|
|
#[inline]
|
|
pub fn modosc_en(&mut self) -> _MODOSC_ENW {
|
|
_MODOSC_ENW { w: self }
|
|
}
|
|
#[doc = "Bit 15 - Selects REFO nominal frequency"]
|
|
#[inline]
|
|
pub fn refofsel(&mut self) -> _REFOFSELW {
|
|
_REFOFSELW { w: self }
|
|
}
|
|
}
|