443 lines
12 KiB
Rust
443 lines
12 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::ADC14CLRIFGR1 {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14INIFG`"]
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pub enum CLRADC14INIFGW {
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#[doc = "no effect"]
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CLRADC14INIFG_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14INIFG_1,
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}
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impl CLRADC14INIFGW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14INIFGW::CLRADC14INIFG_0 => false,
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CLRADC14INIFGW::CLRADC14INIFG_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14INIFGW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14INIFGW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14INIFGW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14inifg_0(self) -> &'a mut W {
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self.variant(CLRADC14INIFGW::CLRADC14INIFG_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14inifg_1(self) -> &'a mut W {
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self.variant(CLRADC14INIFGW::CLRADC14INIFG_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 1;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14LOIFG`"]
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pub enum CLRADC14LOIFGW {
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#[doc = "no effect"]
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CLRADC14LOIFG_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14LOIFG_1,
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}
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impl CLRADC14LOIFGW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14LOIFGW::CLRADC14LOIFG_0 => false,
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CLRADC14LOIFGW::CLRADC14LOIFG_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14LOIFGW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14LOIFGW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14LOIFGW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14loifg_0(self) -> &'a mut W {
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self.variant(CLRADC14LOIFGW::CLRADC14LOIFG_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14loifg_1(self) -> &'a mut W {
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self.variant(CLRADC14LOIFGW::CLRADC14LOIFG_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 2;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14HIIFG`"]
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pub enum CLRADC14HIIFGW {
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#[doc = "no effect"]
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CLRADC14HIIFG_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14HIIFG_1,
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}
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impl CLRADC14HIIFGW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14HIIFGW::CLRADC14HIIFG_0 => false,
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CLRADC14HIIFGW::CLRADC14HIIFG_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14HIIFGW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14HIIFGW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14HIIFGW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14hiifg_0(self) -> &'a mut W {
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self.variant(CLRADC14HIIFGW::CLRADC14HIIFG_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14hiifg_1(self) -> &'a mut W {
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self.variant(CLRADC14HIIFGW::CLRADC14HIIFG_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 3;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14OVIFG`"]
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pub enum CLRADC14OVIFGW {
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#[doc = "no effect"]
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CLRADC14OVIFG_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14OVIFG_1,
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}
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impl CLRADC14OVIFGW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14OVIFGW::CLRADC14OVIFG_0 => false,
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CLRADC14OVIFGW::CLRADC14OVIFG_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14OVIFGW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14OVIFGW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14OVIFGW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ovifg_0(self) -> &'a mut W {
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self.variant(CLRADC14OVIFGW::CLRADC14OVIFG_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ovifg_1(self) -> &'a mut W {
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self.variant(CLRADC14OVIFGW::CLRADC14OVIFG_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 4;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14TOVIFG`"]
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pub enum CLRADC14TOVIFGW {
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#[doc = "no effect"]
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CLRADC14TOVIFG_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14TOVIFG_1,
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}
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impl CLRADC14TOVIFGW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14TOVIFGW::CLRADC14TOVIFG_0 => false,
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CLRADC14TOVIFGW::CLRADC14TOVIFG_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14TOVIFGW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14TOVIFGW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14TOVIFGW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14tovifg_0(self) -> &'a mut W {
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self.variant(CLRADC14TOVIFGW::CLRADC14TOVIFG_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14tovifg_1(self) -> &'a mut W {
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self.variant(CLRADC14TOVIFGW::CLRADC14TOVIFG_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 5;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14RDYIFG`"]
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pub enum CLRADC14RDYIFGW {
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#[doc = "no effect"]
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CLRADC14RDYIFG_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14RDYIFG_1,
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}
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impl CLRADC14RDYIFGW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14RDYIFGW::CLRADC14RDYIFG_0 => false,
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CLRADC14RDYIFGW::CLRADC14RDYIFG_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14RDYIFGW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14RDYIFGW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14RDYIFGW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14rdyifg_0(self) -> &'a mut W {
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self.variant(CLRADC14RDYIFGW::CLRADC14RDYIFG_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14rdyifg_1(self) -> &'a mut W {
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self.variant(CLRADC14RDYIFGW::CLRADC14RDYIFG_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 6;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 0 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bit 1 - clear ADC14INIFG"]
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#[inline]
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pub fn clradc14inifg(&mut self) -> _CLRADC14INIFGW {
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_CLRADC14INIFGW { w: self }
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}
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#[doc = "Bit 2 - clear ADC14LOIFG"]
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#[inline]
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pub fn clradc14loifg(&mut self) -> _CLRADC14LOIFGW {
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_CLRADC14LOIFGW { w: self }
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}
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#[doc = "Bit 3 - clear ADC14HIIFG"]
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#[inline]
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pub fn clradc14hiifg(&mut self) -> _CLRADC14HIIFGW {
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_CLRADC14HIIFGW { w: self }
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}
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#[doc = "Bit 4 - clear ADC14OVIFG"]
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#[inline]
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pub fn clradc14ovifg(&mut self) -> _CLRADC14OVIFGW {
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_CLRADC14OVIFGW { w: self }
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}
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#[doc = "Bit 5 - clear ADC14TOVIFG"]
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#[inline]
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pub fn clradc14tovifg(&mut self) -> _CLRADC14TOVIFGW {
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_CLRADC14TOVIFGW { w: self }
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}
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#[doc = "Bit 6 - clear ADC14RDYIFG"]
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#[inline]
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pub fn clradc14rdyifg(&mut self) -> _CLRADC14RDYIFGW {
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_CLRADC14RDYIFGW { w: self }
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}
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}
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