2046 lines
55 KiB
Rust
2046 lines
55 KiB
Rust
#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::ADC14CLRIFGR0 {
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG0`"]
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pub enum CLRADC14IFG0W {
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#[doc = "no effect"]
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CLRADC14IFG0_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG0_1,
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}
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impl CLRADC14IFG0W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG0W::CLRADC14IFG0_0 => false,
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CLRADC14IFG0W::CLRADC14IFG0_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG0W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG0W<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14IFG0W) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ifg0_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG0W::CLRADC14IFG0_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg0_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG0W::CLRADC14IFG0_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG1`"]
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pub enum CLRADC14IFG1W {
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#[doc = "no effect"]
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CLRADC14IFG1_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG1_1,
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}
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impl CLRADC14IFG1W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG1W::CLRADC14IFG1_0 => false,
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CLRADC14IFG1W::CLRADC14IFG1_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG1W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG1W<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14IFG1W) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ifg1_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG1W::CLRADC14IFG1_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg1_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG1W::CLRADC14IFG1_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 1;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG2`"]
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pub enum CLRADC14IFG2W {
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#[doc = "no effect"]
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CLRADC14IFG2_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG2_1,
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}
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impl CLRADC14IFG2W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG2W::CLRADC14IFG2_0 => false,
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CLRADC14IFG2W::CLRADC14IFG2_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG2W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG2W<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14IFG2W) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ifg2_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG2W::CLRADC14IFG2_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg2_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG2W::CLRADC14IFG2_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 2;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG3`"]
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pub enum CLRADC14IFG3W {
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#[doc = "no effect"]
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CLRADC14IFG3_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG3_1,
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}
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impl CLRADC14IFG3W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG3W::CLRADC14IFG3_0 => false,
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CLRADC14IFG3W::CLRADC14IFG3_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG3W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG3W<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14IFG3W) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ifg3_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG3W::CLRADC14IFG3_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg3_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG3W::CLRADC14IFG3_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 3;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG4`"]
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pub enum CLRADC14IFG4W {
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#[doc = "no effect"]
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CLRADC14IFG4_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG4_1,
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}
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impl CLRADC14IFG4W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG4W::CLRADC14IFG4_0 => false,
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CLRADC14IFG4W::CLRADC14IFG4_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG4W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG4W<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14IFG4W) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ifg4_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG4W::CLRADC14IFG4_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg4_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG4W::CLRADC14IFG4_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 4;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG5`"]
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pub enum CLRADC14IFG5W {
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#[doc = "no effect"]
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CLRADC14IFG5_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG5_1,
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}
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impl CLRADC14IFG5W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG5W::CLRADC14IFG5_0 => false,
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CLRADC14IFG5W::CLRADC14IFG5_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG5W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG5W<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CLRADC14IFG5W) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "no effect"]
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#[inline]
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pub fn clradc14ifg5_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG5W::CLRADC14IFG5_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg5_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG5W::CLRADC14IFG5_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 5;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CLRADC14IFG6`"]
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pub enum CLRADC14IFG6W {
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#[doc = "no effect"]
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CLRADC14IFG6_0,
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#[doc = "clear pending interrupt flag"]
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CLRADC14IFG6_1,
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}
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impl CLRADC14IFG6W {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CLRADC14IFG6W::CLRADC14IFG6_0 => false,
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CLRADC14IFG6W::CLRADC14IFG6_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CLRADC14IFG6W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CLRADC14IFG6W<'a> {
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#[doc = r" Writes `variant` to the field"]
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|
#[inline]
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pub fn variant(self, variant: CLRADC14IFG6W) -> &'a mut W {
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|
{
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|
self.bit(variant._bits())
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}
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|
}
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|
#[doc = "no effect"]
|
|
#[inline]
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pub fn clradc14ifg6_0(self) -> &'a mut W {
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self.variant(CLRADC14IFG6W::CLRADC14IFG6_0)
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}
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#[doc = "clear pending interrupt flag"]
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#[inline]
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pub fn clradc14ifg6_1(self) -> &'a mut W {
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self.variant(CLRADC14IFG6W::CLRADC14IFG6_1)
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}
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#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
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|
const MASK: bool = true;
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|
const OFFSET: u8 = 6;
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|
self.w.bits &= !((MASK as u32) << OFFSET);
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|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
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|
self.w
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|
}
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|
}
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|
#[doc = "Values that can be written to the field `CLRADC14IFG7`"]
|
|
pub enum CLRADC14IFG7W {
|
|
#[doc = "no effect"]
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|
CLRADC14IFG7_0,
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|
#[doc = "clear pending interrupt flag"]
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|
CLRADC14IFG7_1,
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|
}
|
|
impl CLRADC14IFG7W {
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|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
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|
match *self {
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|
CLRADC14IFG7W::CLRADC14IFG7_0 => false,
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|
CLRADC14IFG7W::CLRADC14IFG7_1 => true,
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|
}
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|
}
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|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG7W<'a> {
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w: &'a mut W,
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}
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|
impl<'a> _CLRADC14IFG7W<'a> {
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|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG7W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg7_0(self) -> &'a mut W {
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|
self.variant(CLRADC14IFG7W::CLRADC14IFG7_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg7_1(self) -> &'a mut W {
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|
self.variant(CLRADC14IFG7W::CLRADC14IFG7_1)
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|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
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|
self.bit(true)
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|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
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|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 7;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG8`"]
|
|
pub enum CLRADC14IFG8W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG8_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG8_1,
|
|
}
|
|
impl CLRADC14IFG8W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG8W::CLRADC14IFG8_0 => false,
|
|
CLRADC14IFG8W::CLRADC14IFG8_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG8W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG8W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG8W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg8_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG8W::CLRADC14IFG8_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg8_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG8W::CLRADC14IFG8_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 8;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG9`"]
|
|
pub enum CLRADC14IFG9W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG9_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG9_1,
|
|
}
|
|
impl CLRADC14IFG9W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG9W::CLRADC14IFG9_0 => false,
|
|
CLRADC14IFG9W::CLRADC14IFG9_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG9W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG9W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG9W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg9_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG9W::CLRADC14IFG9_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg9_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG9W::CLRADC14IFG9_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 9;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG10`"]
|
|
pub enum CLRADC14IFG10W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG10_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG10_1,
|
|
}
|
|
impl CLRADC14IFG10W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG10W::CLRADC14IFG10_0 => false,
|
|
CLRADC14IFG10W::CLRADC14IFG10_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG10W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG10W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG10W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg10_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG10W::CLRADC14IFG10_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg10_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG10W::CLRADC14IFG10_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 10;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG11`"]
|
|
pub enum CLRADC14IFG11W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG11_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG11_1,
|
|
}
|
|
impl CLRADC14IFG11W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG11W::CLRADC14IFG11_0 => false,
|
|
CLRADC14IFG11W::CLRADC14IFG11_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG11W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG11W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG11W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg11_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG11W::CLRADC14IFG11_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg11_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG11W::CLRADC14IFG11_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 11;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG12`"]
|
|
pub enum CLRADC14IFG12W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG12_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG12_1,
|
|
}
|
|
impl CLRADC14IFG12W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG12W::CLRADC14IFG12_0 => false,
|
|
CLRADC14IFG12W::CLRADC14IFG12_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG12W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG12W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG12W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg12_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG12W::CLRADC14IFG12_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg12_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG12W::CLRADC14IFG12_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 12;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG13`"]
|
|
pub enum CLRADC14IFG13W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG13_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG13_1,
|
|
}
|
|
impl CLRADC14IFG13W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG13W::CLRADC14IFG13_0 => false,
|
|
CLRADC14IFG13W::CLRADC14IFG13_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG13W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG13W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG13W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg13_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG13W::CLRADC14IFG13_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg13_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG13W::CLRADC14IFG13_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 13;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG14`"]
|
|
pub enum CLRADC14IFG14W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG14_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG14_1,
|
|
}
|
|
impl CLRADC14IFG14W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG14W::CLRADC14IFG14_0 => false,
|
|
CLRADC14IFG14W::CLRADC14IFG14_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG14W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG14W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG14W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg14_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG14W::CLRADC14IFG14_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg14_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG14W::CLRADC14IFG14_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 14;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG15`"]
|
|
pub enum CLRADC14IFG15W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG15_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG15_1,
|
|
}
|
|
impl CLRADC14IFG15W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG15W::CLRADC14IFG15_0 => false,
|
|
CLRADC14IFG15W::CLRADC14IFG15_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG15W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG15W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG15W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg15_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG15W::CLRADC14IFG15_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg15_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG15W::CLRADC14IFG15_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 15;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG16`"]
|
|
pub enum CLRADC14IFG16W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG16_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG16_1,
|
|
}
|
|
impl CLRADC14IFG16W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG16W::CLRADC14IFG16_0 => false,
|
|
CLRADC14IFG16W::CLRADC14IFG16_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG16W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG16W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG16W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg16_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG16W::CLRADC14IFG16_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg16_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG16W::CLRADC14IFG16_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 16;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG17`"]
|
|
pub enum CLRADC14IFG17W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG17_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG17_1,
|
|
}
|
|
impl CLRADC14IFG17W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG17W::CLRADC14IFG17_0 => false,
|
|
CLRADC14IFG17W::CLRADC14IFG17_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG17W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG17W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG17W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg17_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG17W::CLRADC14IFG17_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg17_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG17W::CLRADC14IFG17_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 17;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG18`"]
|
|
pub enum CLRADC14IFG18W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG18_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG18_1,
|
|
}
|
|
impl CLRADC14IFG18W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG18W::CLRADC14IFG18_0 => false,
|
|
CLRADC14IFG18W::CLRADC14IFG18_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG18W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG18W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG18W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg18_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG18W::CLRADC14IFG18_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg18_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG18W::CLRADC14IFG18_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 18;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG19`"]
|
|
pub enum CLRADC14IFG19W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG19_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG19_1,
|
|
}
|
|
impl CLRADC14IFG19W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG19W::CLRADC14IFG19_0 => false,
|
|
CLRADC14IFG19W::CLRADC14IFG19_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG19W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG19W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG19W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg19_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG19W::CLRADC14IFG19_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg19_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG19W::CLRADC14IFG19_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 19;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG20`"]
|
|
pub enum CLRADC14IFG20W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG20_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG20_1,
|
|
}
|
|
impl CLRADC14IFG20W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG20W::CLRADC14IFG20_0 => false,
|
|
CLRADC14IFG20W::CLRADC14IFG20_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG20W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG20W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG20W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg20_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG20W::CLRADC14IFG20_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg20_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG20W::CLRADC14IFG20_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 20;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG21`"]
|
|
pub enum CLRADC14IFG21W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG21_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG21_1,
|
|
}
|
|
impl CLRADC14IFG21W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG21W::CLRADC14IFG21_0 => false,
|
|
CLRADC14IFG21W::CLRADC14IFG21_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG21W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG21W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG21W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg21_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG21W::CLRADC14IFG21_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg21_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG21W::CLRADC14IFG21_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 21;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG22`"]
|
|
pub enum CLRADC14IFG22W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG22_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG22_1,
|
|
}
|
|
impl CLRADC14IFG22W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG22W::CLRADC14IFG22_0 => false,
|
|
CLRADC14IFG22W::CLRADC14IFG22_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG22W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG22W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG22W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg22_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG22W::CLRADC14IFG22_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg22_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG22W::CLRADC14IFG22_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 22;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG23`"]
|
|
pub enum CLRADC14IFG23W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG23_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG23_1,
|
|
}
|
|
impl CLRADC14IFG23W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG23W::CLRADC14IFG23_0 => false,
|
|
CLRADC14IFG23W::CLRADC14IFG23_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG23W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG23W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG23W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg23_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG23W::CLRADC14IFG23_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg23_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG23W::CLRADC14IFG23_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 23;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG24`"]
|
|
pub enum CLRADC14IFG24W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG24_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG24_1,
|
|
}
|
|
impl CLRADC14IFG24W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG24W::CLRADC14IFG24_0 => false,
|
|
CLRADC14IFG24W::CLRADC14IFG24_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG24W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG24W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG24W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg24_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG24W::CLRADC14IFG24_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg24_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG24W::CLRADC14IFG24_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 24;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG25`"]
|
|
pub enum CLRADC14IFG25W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG25_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG25_1,
|
|
}
|
|
impl CLRADC14IFG25W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG25W::CLRADC14IFG25_0 => false,
|
|
CLRADC14IFG25W::CLRADC14IFG25_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG25W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG25W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG25W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg25_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG25W::CLRADC14IFG25_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg25_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG25W::CLRADC14IFG25_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 25;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG26`"]
|
|
pub enum CLRADC14IFG26W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG26_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG26_1,
|
|
}
|
|
impl CLRADC14IFG26W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG26W::CLRADC14IFG26_0 => false,
|
|
CLRADC14IFG26W::CLRADC14IFG26_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG26W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG26W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG26W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg26_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG26W::CLRADC14IFG26_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg26_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG26W::CLRADC14IFG26_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 26;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG27`"]
|
|
pub enum CLRADC14IFG27W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG27_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG27_1,
|
|
}
|
|
impl CLRADC14IFG27W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG27W::CLRADC14IFG27_0 => false,
|
|
CLRADC14IFG27W::CLRADC14IFG27_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG27W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG27W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG27W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg27_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG27W::CLRADC14IFG27_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg27_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG27W::CLRADC14IFG27_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 27;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG28`"]
|
|
pub enum CLRADC14IFG28W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG28_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG28_1,
|
|
}
|
|
impl CLRADC14IFG28W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG28W::CLRADC14IFG28_0 => false,
|
|
CLRADC14IFG28W::CLRADC14IFG28_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG28W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG28W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG28W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg28_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG28W::CLRADC14IFG28_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg28_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG28W::CLRADC14IFG28_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 28;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG29`"]
|
|
pub enum CLRADC14IFG29W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG29_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG29_1,
|
|
}
|
|
impl CLRADC14IFG29W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG29W::CLRADC14IFG29_0 => false,
|
|
CLRADC14IFG29W::CLRADC14IFG29_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG29W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG29W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG29W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg29_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG29W::CLRADC14IFG29_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg29_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG29W::CLRADC14IFG29_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 29;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG30`"]
|
|
pub enum CLRADC14IFG30W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG30_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG30_1,
|
|
}
|
|
impl CLRADC14IFG30W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG30W::CLRADC14IFG30_0 => false,
|
|
CLRADC14IFG30W::CLRADC14IFG30_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG30W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG30W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG30W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg30_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG30W::CLRADC14IFG30_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg30_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG30W::CLRADC14IFG30_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 30;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `CLRADC14IFG31`"]
|
|
pub enum CLRADC14IFG31W {
|
|
#[doc = "no effect"]
|
|
CLRADC14IFG31_0,
|
|
#[doc = "clear pending interrupt flag"]
|
|
CLRADC14IFG31_1,
|
|
}
|
|
impl CLRADC14IFG31W {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
CLRADC14IFG31W::CLRADC14IFG31_0 => false,
|
|
CLRADC14IFG31W::CLRADC14IFG31_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CLRADC14IFG31W<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CLRADC14IFG31W<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: CLRADC14IFG31W) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "no effect"]
|
|
#[inline]
|
|
pub fn clradc14ifg31_0(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG31W::CLRADC14IFG31_0)
|
|
}
|
|
#[doc = "clear pending interrupt flag"]
|
|
#[inline]
|
|
pub fn clradc14ifg31_1(self) -> &'a mut W {
|
|
self.variant(CLRADC14IFG31W::CLRADC14IFG31_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 31;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = r" Reset value of the register"]
|
|
#[inline]
|
|
pub fn reset_value() -> W {
|
|
W { bits: 0 }
|
|
}
|
|
#[doc = r" Writes raw bits to the register"]
|
|
#[inline]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.bits = bits;
|
|
self
|
|
}
|
|
#[doc = "Bit 0 - clear ADC14IFG0"]
|
|
#[inline]
|
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pub fn clradc14ifg0(&mut self) -> _CLRADC14IFG0W {
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_CLRADC14IFG0W { w: self }
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}
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|
#[doc = "Bit 1 - clear ADC14IFG1"]
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|
#[inline]
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pub fn clradc14ifg1(&mut self) -> _CLRADC14IFG1W {
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|
_CLRADC14IFG1W { w: self }
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}
|
|
#[doc = "Bit 2 - clear ADC14IFG2"]
|
|
#[inline]
|
|
pub fn clradc14ifg2(&mut self) -> _CLRADC14IFG2W {
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|
_CLRADC14IFG2W { w: self }
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|
}
|
|
#[doc = "Bit 3 - clear ADC14IFG3"]
|
|
#[inline]
|
|
pub fn clradc14ifg3(&mut self) -> _CLRADC14IFG3W {
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|
_CLRADC14IFG3W { w: self }
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|
}
|
|
#[doc = "Bit 4 - clear ADC14IFG4"]
|
|
#[inline]
|
|
pub fn clradc14ifg4(&mut self) -> _CLRADC14IFG4W {
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|
_CLRADC14IFG4W { w: self }
|
|
}
|
|
#[doc = "Bit 5 - clear ADC14IFG5"]
|
|
#[inline]
|
|
pub fn clradc14ifg5(&mut self) -> _CLRADC14IFG5W {
|
|
_CLRADC14IFG5W { w: self }
|
|
}
|
|
#[doc = "Bit 6 - clear ADC14IFG6"]
|
|
#[inline]
|
|
pub fn clradc14ifg6(&mut self) -> _CLRADC14IFG6W {
|
|
_CLRADC14IFG6W { w: self }
|
|
}
|
|
#[doc = "Bit 7 - clear ADC14IFG7"]
|
|
#[inline]
|
|
pub fn clradc14ifg7(&mut self) -> _CLRADC14IFG7W {
|
|
_CLRADC14IFG7W { w: self }
|
|
}
|
|
#[doc = "Bit 8 - clear ADC14IFG8"]
|
|
#[inline]
|
|
pub fn clradc14ifg8(&mut self) -> _CLRADC14IFG8W {
|
|
_CLRADC14IFG8W { w: self }
|
|
}
|
|
#[doc = "Bit 9 - clear ADC14IFG9"]
|
|
#[inline]
|
|
pub fn clradc14ifg9(&mut self) -> _CLRADC14IFG9W {
|
|
_CLRADC14IFG9W { w: self }
|
|
}
|
|
#[doc = "Bit 10 - clear ADC14IFG10"]
|
|
#[inline]
|
|
pub fn clradc14ifg10(&mut self) -> _CLRADC14IFG10W {
|
|
_CLRADC14IFG10W { w: self }
|
|
}
|
|
#[doc = "Bit 11 - clear ADC14IFG11"]
|
|
#[inline]
|
|
pub fn clradc14ifg11(&mut self) -> _CLRADC14IFG11W {
|
|
_CLRADC14IFG11W { w: self }
|
|
}
|
|
#[doc = "Bit 12 - clear ADC14IFG12"]
|
|
#[inline]
|
|
pub fn clradc14ifg12(&mut self) -> _CLRADC14IFG12W {
|
|
_CLRADC14IFG12W { w: self }
|
|
}
|
|
#[doc = "Bit 13 - clear ADC14IFG13"]
|
|
#[inline]
|
|
pub fn clradc14ifg13(&mut self) -> _CLRADC14IFG13W {
|
|
_CLRADC14IFG13W { w: self }
|
|
}
|
|
#[doc = "Bit 14 - clear ADC14IFG14"]
|
|
#[inline]
|
|
pub fn clradc14ifg14(&mut self) -> _CLRADC14IFG14W {
|
|
_CLRADC14IFG14W { w: self }
|
|
}
|
|
#[doc = "Bit 15 - clear ADC14IFG15"]
|
|
#[inline]
|
|
pub fn clradc14ifg15(&mut self) -> _CLRADC14IFG15W {
|
|
_CLRADC14IFG15W { w: self }
|
|
}
|
|
#[doc = "Bit 16 - clear ADC14IFG16"]
|
|
#[inline]
|
|
pub fn clradc14ifg16(&mut self) -> _CLRADC14IFG16W {
|
|
_CLRADC14IFG16W { w: self }
|
|
}
|
|
#[doc = "Bit 17 - clear ADC14IFG17"]
|
|
#[inline]
|
|
pub fn clradc14ifg17(&mut self) -> _CLRADC14IFG17W {
|
|
_CLRADC14IFG17W { w: self }
|
|
}
|
|
#[doc = "Bit 18 - clear ADC14IFG18"]
|
|
#[inline]
|
|
pub fn clradc14ifg18(&mut self) -> _CLRADC14IFG18W {
|
|
_CLRADC14IFG18W { w: self }
|
|
}
|
|
#[doc = "Bit 19 - clear ADC14IFG19"]
|
|
#[inline]
|
|
pub fn clradc14ifg19(&mut self) -> _CLRADC14IFG19W {
|
|
_CLRADC14IFG19W { w: self }
|
|
}
|
|
#[doc = "Bit 20 - clear ADC14IFG20"]
|
|
#[inline]
|
|
pub fn clradc14ifg20(&mut self) -> _CLRADC14IFG20W {
|
|
_CLRADC14IFG20W { w: self }
|
|
}
|
|
#[doc = "Bit 21 - clear ADC14IFG21"]
|
|
#[inline]
|
|
pub fn clradc14ifg21(&mut self) -> _CLRADC14IFG21W {
|
|
_CLRADC14IFG21W { w: self }
|
|
}
|
|
#[doc = "Bit 22 - clear ADC14IFG22"]
|
|
#[inline]
|
|
pub fn clradc14ifg22(&mut self) -> _CLRADC14IFG22W {
|
|
_CLRADC14IFG22W { w: self }
|
|
}
|
|
#[doc = "Bit 23 - clear ADC14IFG23"]
|
|
#[inline]
|
|
pub fn clradc14ifg23(&mut self) -> _CLRADC14IFG23W {
|
|
_CLRADC14IFG23W { w: self }
|
|
}
|
|
#[doc = "Bit 24 - clear ADC14IFG24"]
|
|
#[inline]
|
|
pub fn clradc14ifg24(&mut self) -> _CLRADC14IFG24W {
|
|
_CLRADC14IFG24W { w: self }
|
|
}
|
|
#[doc = "Bit 25 - clear ADC14IFG25"]
|
|
#[inline]
|
|
pub fn clradc14ifg25(&mut self) -> _CLRADC14IFG25W {
|
|
_CLRADC14IFG25W { w: self }
|
|
}
|
|
#[doc = "Bit 26 - clear ADC14IFG26"]
|
|
#[inline]
|
|
pub fn clradc14ifg26(&mut self) -> _CLRADC14IFG26W {
|
|
_CLRADC14IFG26W { w: self }
|
|
}
|
|
#[doc = "Bit 27 - clear ADC14IFG27"]
|
|
#[inline]
|
|
pub fn clradc14ifg27(&mut self) -> _CLRADC14IFG27W {
|
|
_CLRADC14IFG27W { w: self }
|
|
}
|
|
#[doc = "Bit 28 - clear ADC14IFG28"]
|
|
#[inline]
|
|
pub fn clradc14ifg28(&mut self) -> _CLRADC14IFG28W {
|
|
_CLRADC14IFG28W { w: self }
|
|
}
|
|
#[doc = "Bit 29 - clear ADC14IFG29"]
|
|
#[inline]
|
|
pub fn clradc14ifg29(&mut self) -> _CLRADC14IFG29W {
|
|
_CLRADC14IFG29W { w: self }
|
|
}
|
|
#[doc = "Bit 30 - clear ADC14IFG30"]
|
|
#[inline]
|
|
pub fn clradc14ifg30(&mut self) -> _CLRADC14IFG30W {
|
|
_CLRADC14IFG30W { w: self }
|
|
}
|
|
#[doc = "Bit 31 - clear ADC14IFG31"]
|
|
#[inline]
|
|
pub fn clradc14ifg31(&mut self) -> _CLRADC14IFG31W {
|
|
_CLRADC14IFG31W { w: self }
|
|
}
|
|
}
|