#[doc = r" Value to write to the register"] pub struct W { bits: u32, } impl super::CSCLRIFG { #[doc = r" Writes to the register"] #[inline] pub fn write(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { let mut w = W::reset_value(); f(&mut w); self.register.set(w.bits); } } #[doc = "Values that can be written to the field `CLR_LFXTIFG`"] pub enum CLR_LFXTIFGW { #[doc = "No effect"] CLR_LFXTIFG_0, #[doc = "Clear pending interrupt flag"] CLR_LFXTIFG_1, } impl CLR_LFXTIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_LFXTIFGW::CLR_LFXTIFG_0 => false, CLR_LFXTIFGW::CLR_LFXTIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_LFXTIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_LFXTIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_LFXTIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_lfxtifg_0(self) -> &'a mut W { self.variant(CLR_LFXTIFGW::CLR_LFXTIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_lfxtifg_1(self) -> &'a mut W { self.variant(CLR_LFXTIFGW::CLR_LFXTIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 0; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_HFXTIFG`"] pub enum CLR_HFXTIFGW { #[doc = "No effect"] CLR_HFXTIFG_0, #[doc = "Clear pending interrupt flag"] CLR_HFXTIFG_1, } impl CLR_HFXTIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_HFXTIFGW::CLR_HFXTIFG_0 => false, CLR_HFXTIFGW::CLR_HFXTIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_HFXTIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_HFXTIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_HFXTIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_hfxtifg_0(self) -> &'a mut W { self.variant(CLR_HFXTIFGW::CLR_HFXTIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_hfxtifg_1(self) -> &'a mut W { self.variant(CLR_HFXTIFGW::CLR_HFXTIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 1; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_HFXT2IFG`"] pub enum CLR_HFXT2IFGW { #[doc = "No effect"] CLR_HFXT2IFG_0, #[doc = "Clear pending interrupt flag"] CLR_HFXT2IFG_1, } impl CLR_HFXT2IFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_HFXT2IFGW::CLR_HFXT2IFG_0 => false, CLR_HFXT2IFGW::CLR_HFXT2IFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_HFXT2IFGW<'a> { w: &'a mut W, } impl<'a> _CLR_HFXT2IFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_HFXT2IFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_hfxt2ifg_0(self) -> &'a mut W { self.variant(CLR_HFXT2IFGW::CLR_HFXT2IFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_hfxt2ifg_1(self) -> &'a mut W { self.variant(CLR_HFXT2IFGW::CLR_HFXT2IFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 2; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_DCOR_OPNIFG`"] pub enum CLR_DCOR_OPNIFGW { #[doc = "No effect"] CLR_DCOR_OPNIFG_0, #[doc = "Clear pending interrupt flag"] CLR_DCOR_OPNIFG_1, } impl CLR_DCOR_OPNIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_DCOR_OPNIFGW::CLR_DCOR_OPNIFG_0 => false, CLR_DCOR_OPNIFGW::CLR_DCOR_OPNIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_DCOR_OPNIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_DCOR_OPNIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_DCOR_OPNIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_dcor_opnifg_0(self) -> &'a mut W { self.variant(CLR_DCOR_OPNIFGW::CLR_DCOR_OPNIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_dcor_opnifg_1(self) -> &'a mut W { self.variant(CLR_DCOR_OPNIFGW::CLR_DCOR_OPNIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 6; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_CALIFG`"] pub enum CLR_CALIFGW { #[doc = "No effect"] CLR_CALIFG_0, #[doc = "Clear pending interrupt flag"] CLR_CALIFG_1, } impl CLR_CALIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_CALIFGW::CLR_CALIFG_0 => false, CLR_CALIFGW::CLR_CALIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_CALIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_CALIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_CALIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_califg_0(self) -> &'a mut W { self.variant(CLR_CALIFGW::CLR_CALIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_califg_1(self) -> &'a mut W { self.variant(CLR_CALIFGW::CLR_CALIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 15; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_FCNTLFIFG`"] pub enum CLR_FCNTLFIFGW { #[doc = "No effect"] CLR_FCNTLFIFG_0, #[doc = "Clear pending interrupt flag"] CLR_FCNTLFIFG_1, } impl CLR_FCNTLFIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_FCNTLFIFGW::CLR_FCNTLFIFG_0 => false, CLR_FCNTLFIFGW::CLR_FCNTLFIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_FCNTLFIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_FCNTLFIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_FCNTLFIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_fcntlfifg_0(self) -> &'a mut W { self.variant(CLR_FCNTLFIFGW::CLR_FCNTLFIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_fcntlfifg_1(self) -> &'a mut W { self.variant(CLR_FCNTLFIFGW::CLR_FCNTLFIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 8; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_FCNTHFIFG`"] pub enum CLR_FCNTHFIFGW { #[doc = "No effect"] CLR_FCNTHFIFG_0, #[doc = "Clear pending interrupt flag"] CLR_FCNTHFIFG_1, } impl CLR_FCNTHFIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_FCNTHFIFGW::CLR_FCNTHFIFG_0 => false, CLR_FCNTHFIFGW::CLR_FCNTHFIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_FCNTHFIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_FCNTHFIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_FCNTHFIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_fcnthfifg_0(self) -> &'a mut W { self.variant(CLR_FCNTHFIFGW::CLR_FCNTHFIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_fcnthfifg_1(self) -> &'a mut W { self.variant(CLR_FCNTHFIFGW::CLR_FCNTHFIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 9; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_FCNTHF2IFG`"] pub enum CLR_FCNTHF2IFGW { #[doc = "No effect"] CLR_FCNTHF2IFG_0, #[doc = "Clear pending interrupt flag"] CLR_FCNTHF2IFG_1, } impl CLR_FCNTHF2IFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_FCNTHF2IFGW::CLR_FCNTHF2IFG_0 => false, CLR_FCNTHF2IFGW::CLR_FCNTHF2IFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_FCNTHF2IFGW<'a> { w: &'a mut W, } impl<'a> _CLR_FCNTHF2IFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_FCNTHF2IFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_fcnthf2ifg_0(self) -> &'a mut W { self.variant(CLR_FCNTHF2IFGW::CLR_FCNTHF2IFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_fcnthf2ifg_1(self) -> &'a mut W { self.variant(CLR_FCNTHF2IFGW::CLR_FCNTHF2IFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 10; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_PLLOOLIFG`"] pub enum CLR_PLLOOLIFGW { #[doc = "No effect"] CLR_PLLOOLIFG_0, #[doc = "Clear pending interrupt flag"] CLR_PLLOOLIFG_1, } impl CLR_PLLOOLIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_PLLOOLIFGW::CLR_PLLOOLIFG_0 => false, CLR_PLLOOLIFGW::CLR_PLLOOLIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_PLLOOLIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_PLLOOLIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_PLLOOLIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_plloolifg_0(self) -> &'a mut W { self.variant(CLR_PLLOOLIFGW::CLR_PLLOOLIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_plloolifg_1(self) -> &'a mut W { self.variant(CLR_PLLOOLIFGW::CLR_PLLOOLIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 12; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_PLLLOSIFG`"] pub enum CLR_PLLLOSIFGW { #[doc = "No effect"] CLR_PLLLOSIFG_0, #[doc = "Clear pending interrupt flag"] CLR_PLLLOSIFG_1, } impl CLR_PLLLOSIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_PLLLOSIFGW::CLR_PLLLOSIFG_0 => false, CLR_PLLLOSIFGW::CLR_PLLLOSIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_PLLLOSIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_PLLLOSIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_PLLLOSIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_plllosifg_0(self) -> &'a mut W { self.variant(CLR_PLLLOSIFGW::CLR_PLLLOSIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_plllosifg_1(self) -> &'a mut W { self.variant(CLR_PLLLOSIFGW::CLR_PLLLOSIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 13; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = "Values that can be written to the field `CLR_PLLOORIFG`"] pub enum CLR_PLLOORIFGW { #[doc = "No effect"] CLR_PLLOORIFG_0, #[doc = "Clear pending interrupt flag"] CLR_PLLOORIFG_1, } impl CLR_PLLOORIFGW { #[allow(missing_docs)] #[doc(hidden)] #[inline] pub fn _bits(&self) -> bool { match *self { CLR_PLLOORIFGW::CLR_PLLOORIFG_0 => false, CLR_PLLOORIFGW::CLR_PLLOORIFG_1 => true, } } } #[doc = r" Proxy"] pub struct _CLR_PLLOORIFGW<'a> { w: &'a mut W, } impl<'a> _CLR_PLLOORIFGW<'a> { #[doc = r" Writes `variant` to the field"] #[inline] pub fn variant(self, variant: CLR_PLLOORIFGW) -> &'a mut W { { self.bit(variant._bits()) } } #[doc = "No effect"] #[inline] pub fn clr_plloorifg_0(self) -> &'a mut W { self.variant(CLR_PLLOORIFGW::CLR_PLLOORIFG_0) } #[doc = "Clear pending interrupt flag"] #[inline] pub fn clr_plloorifg_1(self) -> &'a mut W { self.variant(CLR_PLLOORIFGW::CLR_PLLOORIFG_1) } #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 14; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } impl W { #[doc = r" Reset value of the register"] #[inline] pub fn reset_value() -> W { W { bits: 0 } } #[doc = r" Writes raw bits to the register"] #[inline] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - Clear LFXT oscillator fault interrupt flag"] #[inline] pub fn clr_lfxtifg(&mut self) -> _CLR_LFXTIFGW { _CLR_LFXTIFGW { w: self } } #[doc = "Bit 1 - Clear HFXT oscillator fault interrupt flag"] #[inline] pub fn clr_hfxtifg(&mut self) -> _CLR_HFXTIFGW { _CLR_HFXTIFGW { w: self } } #[doc = "Bit 2 - Clear HFXT2 oscillator fault interrupt flag"] #[inline] pub fn clr_hfxt2ifg(&mut self) -> _CLR_HFXT2IFGW { _CLR_HFXT2IFGW { w: self } } #[doc = "Bit 6 - Clear DCO external resistor open circuit fault interrupt flag."] #[inline] pub fn clr_dcor_opnifg(&mut self) -> _CLR_DCOR_OPNIFGW { _CLR_DCOR_OPNIFGW { w: self } } #[doc = "Bit 15 - REFCNT period counter clear interrupt flag"] #[inline] pub fn clr_califg(&mut self) -> _CLR_CALIFGW { _CLR_CALIFGW { w: self } } #[doc = "Bit 8 - Start fault counter clear interrupt flag LFXT"] #[inline] pub fn clr_fcntlfifg(&mut self) -> _CLR_FCNTLFIFGW { _CLR_FCNTLFIFGW { w: self } } #[doc = "Bit 9 - Start fault counter clear interrupt flag HFXT"] #[inline] pub fn clr_fcnthfifg(&mut self) -> _CLR_FCNTHFIFGW { _CLR_FCNTHFIFGW { w: self } } #[doc = "Bit 10 - Start fault counter clear interrupt flag HFXT2"] #[inline] pub fn clr_fcnthf2ifg(&mut self) -> _CLR_FCNTHF2IFGW { _CLR_FCNTHF2IFGW { w: self } } #[doc = "Bit 12 - PLL out-of-lock clear interrupt flag"] #[inline] pub fn clr_plloolifg(&mut self) -> _CLR_PLLOOLIFGW { _CLR_PLLOOLIFGW { w: self } } #[doc = "Bit 13 - PLL loss-of-signal clear interrupt flag"] #[inline] pub fn clr_plllosifg(&mut self) -> _CLR_PLLLOSIFGW { _CLR_PLLLOSIFGW { w: self } } #[doc = "Bit 14 - PLL out-of-range clear interrupt flag"] #[inline] pub fn clr_plloorifg(&mut self) -> _CLR_PLLOORIFGW { _CLR_PLLOORIFGW { w: self } } }