#[doc = r" Value read from the register"]
pub struct R {
    bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
    bits: u32,
}
impl super::ADC14CLRIFGR1 {
    #[doc = r" Modifies the contents of the register"]
    #[inline]
    pub fn modify<F>(&self, f: F)
    where
        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
    {
        let bits = self.register.get();
        let r = R { bits: bits };
        let mut w = W { bits: bits };
        f(&r, &mut w);
        self.register.set(w.bits);
    }
    #[doc = r" Reads the contents of the register"]
    #[inline]
    pub fn read(&self) -> R {
        R {
            bits: self.register.get(),
        }
    }
    #[doc = r" Writes to the register"]
    #[inline]
    pub fn write<F>(&self, f: F)
    where
        F: FnOnce(&mut W) -> &mut W,
    {
        let mut w = W::reset_value();
        f(&mut w);
        self.register.set(w.bits);
    }
    #[doc = r" Writes the reset value to the register"]
    #[inline]
    pub fn reset(&self) {
        self.write(|w| w)
    }
}
#[doc = "Values that can be written to the field `CLRADC14INIFG`"]
pub enum CLRADC14INIFGW {
    #[doc = "no effect"]
    CLRADC14INIFG_0,
    #[doc = "clear pending interrupt flag"]
    CLRADC14INIFG_1,
}
impl CLRADC14INIFGW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            CLRADC14INIFGW::CLRADC14INIFG_0 => false,
            CLRADC14INIFGW::CLRADC14INIFG_1 => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _CLRADC14INIFGW<'a> {
    w: &'a mut W,
}
impl<'a> _CLRADC14INIFGW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: CLRADC14INIFGW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "no effect"]
    #[inline]
    pub fn clradc14inifg_0(self) -> &'a mut W {
        self.variant(CLRADC14INIFGW::CLRADC14INIFG_0)
    }
    #[doc = "clear pending interrupt flag"]
    #[inline]
    pub fn clradc14inifg_1(self) -> &'a mut W {
        self.variant(CLRADC14INIFGW::CLRADC14INIFG_1)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 1;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `CLRADC14LOIFG`"]
pub enum CLRADC14LOIFGW {
    #[doc = "no effect"]
    CLRADC14LOIFG_0,
    #[doc = "clear pending interrupt flag"]
    CLRADC14LOIFG_1,
}
impl CLRADC14LOIFGW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            CLRADC14LOIFGW::CLRADC14LOIFG_0 => false,
            CLRADC14LOIFGW::CLRADC14LOIFG_1 => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _CLRADC14LOIFGW<'a> {
    w: &'a mut W,
}
impl<'a> _CLRADC14LOIFGW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: CLRADC14LOIFGW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "no effect"]
    #[inline]
    pub fn clradc14loifg_0(self) -> &'a mut W {
        self.variant(CLRADC14LOIFGW::CLRADC14LOIFG_0)
    }
    #[doc = "clear pending interrupt flag"]
    #[inline]
    pub fn clradc14loifg_1(self) -> &'a mut W {
        self.variant(CLRADC14LOIFGW::CLRADC14LOIFG_1)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 2;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `CLRADC14HIIFG`"]
pub enum CLRADC14HIIFGW {
    #[doc = "no effect"]
    CLRADC14HIIFG_0,
    #[doc = "clear pending interrupt flag"]
    CLRADC14HIIFG_1,
}
impl CLRADC14HIIFGW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            CLRADC14HIIFGW::CLRADC14HIIFG_0 => false,
            CLRADC14HIIFGW::CLRADC14HIIFG_1 => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _CLRADC14HIIFGW<'a> {
    w: &'a mut W,
}
impl<'a> _CLRADC14HIIFGW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: CLRADC14HIIFGW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "no effect"]
    #[inline]
    pub fn clradc14hiifg_0(self) -> &'a mut W {
        self.variant(CLRADC14HIIFGW::CLRADC14HIIFG_0)
    }
    #[doc = "clear pending interrupt flag"]
    #[inline]
    pub fn clradc14hiifg_1(self) -> &'a mut W {
        self.variant(CLRADC14HIIFGW::CLRADC14HIIFG_1)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 3;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `CLRADC14OVIFG`"]
pub enum CLRADC14OVIFGW {
    #[doc = "no effect"]
    CLRADC14OVIFG_0,
    #[doc = "clear pending interrupt flag"]
    CLRADC14OVIFG_1,
}
impl CLRADC14OVIFGW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            CLRADC14OVIFGW::CLRADC14OVIFG_0 => false,
            CLRADC14OVIFGW::CLRADC14OVIFG_1 => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _CLRADC14OVIFGW<'a> {
    w: &'a mut W,
}
impl<'a> _CLRADC14OVIFGW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: CLRADC14OVIFGW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "no effect"]
    #[inline]
    pub fn clradc14ovifg_0(self) -> &'a mut W {
        self.variant(CLRADC14OVIFGW::CLRADC14OVIFG_0)
    }
    #[doc = "clear pending interrupt flag"]
    #[inline]
    pub fn clradc14ovifg_1(self) -> &'a mut W {
        self.variant(CLRADC14OVIFGW::CLRADC14OVIFG_1)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 4;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `CLRADC14TOVIFG`"]
pub enum CLRADC14TOVIFGW {
    #[doc = "no effect"]
    CLRADC14TOVIFG_0,
    #[doc = "clear pending interrupt flag"]
    CLRADC14TOVIFG_1,
}
impl CLRADC14TOVIFGW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            CLRADC14TOVIFGW::CLRADC14TOVIFG_0 => false,
            CLRADC14TOVIFGW::CLRADC14TOVIFG_1 => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _CLRADC14TOVIFGW<'a> {
    w: &'a mut W,
}
impl<'a> _CLRADC14TOVIFGW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: CLRADC14TOVIFGW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "no effect"]
    #[inline]
    pub fn clradc14tovifg_0(self) -> &'a mut W {
        self.variant(CLRADC14TOVIFGW::CLRADC14TOVIFG_0)
    }
    #[doc = "clear pending interrupt flag"]
    #[inline]
    pub fn clradc14tovifg_1(self) -> &'a mut W {
        self.variant(CLRADC14TOVIFGW::CLRADC14TOVIFG_1)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 5;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
#[doc = "Values that can be written to the field `CLRADC14RDYIFG`"]
pub enum CLRADC14RDYIFGW {
    #[doc = "no effect"]
    CLRADC14RDYIFG_0,
    #[doc = "clear pending interrupt flag"]
    CLRADC14RDYIFG_1,
}
impl CLRADC14RDYIFGW {
    #[allow(missing_docs)]
    #[doc(hidden)]
    #[inline]
    pub fn _bits(&self) -> bool {
        match *self {
            CLRADC14RDYIFGW::CLRADC14RDYIFG_0 => false,
            CLRADC14RDYIFGW::CLRADC14RDYIFG_1 => true,
        }
    }
}
#[doc = r" Proxy"]
pub struct _CLRADC14RDYIFGW<'a> {
    w: &'a mut W,
}
impl<'a> _CLRADC14RDYIFGW<'a> {
    #[doc = r" Writes `variant` to the field"]
    #[inline]
    pub fn variant(self, variant: CLRADC14RDYIFGW) -> &'a mut W {
        {
            self.bit(variant._bits())
        }
    }
    #[doc = "no effect"]
    #[inline]
    pub fn clradc14rdyifg_0(self) -> &'a mut W {
        self.variant(CLRADC14RDYIFGW::CLRADC14RDYIFG_0)
    }
    #[doc = "clear pending interrupt flag"]
    #[inline]
    pub fn clradc14rdyifg_1(self) -> &'a mut W {
        self.variant(CLRADC14RDYIFGW::CLRADC14RDYIFG_1)
    }
    #[doc = r" Sets the field bit"]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r" Clears the field bit"]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r" Writes raw bits to the field"]
    #[inline]
    pub fn bit(self, value: bool) -> &'a mut W {
        const MASK: bool = true;
        const OFFSET: u8 = 6;
        self.w.bits &= !((MASK as u32) << OFFSET);
        self.w.bits |= ((value & MASK) as u32) << OFFSET;
        self.w
    }
}
impl R {
    #[doc = r" Value of the register as raw bits"]
    #[inline]
    pub fn bits(&self) -> u32 {
        self.bits
    }
}
impl W {
    #[doc = r" Reset value of the register"]
    #[inline]
    pub fn reset_value() -> W {
        W { bits: 0 }
    }
    #[doc = r" Writes raw bits to the register"]
    #[inline]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
    #[doc = "Bit 1 - clear ADC14INIFG"]
    #[inline]
    pub fn clradc14inifg(&mut self) -> _CLRADC14INIFGW {
        _CLRADC14INIFGW { w: self }
    }
    #[doc = "Bit 2 - clear ADC14LOIFG"]
    #[inline]
    pub fn clradc14loifg(&mut self) -> _CLRADC14LOIFGW {
        _CLRADC14LOIFGW { w: self }
    }
    #[doc = "Bit 3 - clear ADC14HIIFG"]
    #[inline]
    pub fn clradc14hiifg(&mut self) -> _CLRADC14HIIFGW {
        _CLRADC14HIIFGW { w: self }
    }
    #[doc = "Bit 4 - clear ADC14OVIFG"]
    #[inline]
    pub fn clradc14ovifg(&mut self) -> _CLRADC14OVIFGW {
        _CLRADC14OVIFGW { w: self }
    }
    #[doc = "Bit 5 - clear ADC14TOVIFG"]
    #[inline]
    pub fn clradc14tovifg(&mut self) -> _CLRADC14TOVIFGW {
        _CLRADC14TOVIFGW { w: self }
    }
    #[doc = "Bit 6 - clear ADC14RDYIFG"]
    #[inline]
    pub fn clradc14rdyifg(&mut self) -> _CLRADC14RDYIFGW {
        _CLRADC14RDYIFGW { w: self }
    }
}