From aaacf82f3919ad85f026b9be6ba658c18fc06a15 Mon Sep 17 00:00:00 2001 From: Levi Pearson Date: Tue, 26 Mar 2019 21:16:52 -0600 Subject: [PATCH] Gpio module added --- Cargo.toml | 4 +- src/bitband.rs | 74 ++++++ src/cs.rs | 1 + src/gpio.rs | 626 ++++++++++++++++++++++++++++++++++++++++++++++++- src/lib.rs | 1 + src/prelude.rs | 3 + 6 files changed, 697 insertions(+), 12 deletions(-) create mode 100644 src/bitband.rs diff --git a/Cargo.toml b/Cargo.toml index e3ab850..289b674 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -11,9 +11,9 @@ edition = "2018" cortex-m = "0.5" embedded-hal = "0.2" nb = "0.1" -msp432p401r = { path = "../msp432p401r" } +msp432p401r = { path = "../msp432-pac" } void = { version = "1.0", default-features = false } cast = { version = "0.2", default-features = false } [features] -rt = ["msp432p401r/rt"] \ No newline at end of file +rt = ["msp432p401r/rt"] diff --git a/src/bitband.rs b/src/bitband.rs new file mode 100644 index 0000000..bed03da --- /dev/null +++ b/src/bitband.rs @@ -0,0 +1,74 @@ +//! Bit-banding access for peripheral registers +//! +//! Accesses to the bit-band region translate to the same-width accesses in the +//! target region, so it is important to use the correct pointer size for the desired +//! access. +//! +//! Bit-band writes on the Cortex M4F translate to an atomic read/modify/write operation + +use core::ptr::{write_volatile, read_volatile}; + +/// This is the first address in the SRAM bit-band region. +const SRAM_BASE: usize = 0x2000_0000; +/// This is the first address *beyond* the SRAM bit-band region. +const SRAM_LIMIT: usize = 0x2000_8000; + +/// This is the first address in the peripheral bit-band region. +const PERIPHERAL_BASE: usize = 0x4000_0000; +/// This is the first address *beyond* the peripheral bit-band region. +const PERIPHERAL_LIMIT: usize = 0x4010_0000; + +/// Each bit-band alias region starts at this offset from the base of +/// the region that it aliases. +const ALIAS_OFFSET: usize = 0x0200_0000; + +const REGION_MASK: usize = 0xF000_0000; +const WORD_MASK: usize = 0x0FFF_0000; + +/// Atomically sets (via read/modify/write) a single bit at the given address +/// without affecting other bits in that memory location. +#[inline] +pub unsafe fn set_bit(address: *const T, bit: u8) { + let address = address as usize; + let bit_address = bitband_alias_of(address, bit); + write_volatile(bit_address as *mut _, 0x01); +} + +/// Atomically clears (via read/modify/write) a single bit at the given address +/// without affecting other bits in that memory location. +#[inline] +pub unsafe fn clear_bit(address: *const T, bit: u8) { + let address = address as usize; + let bit_address = bitband_alias_of(address, bit); + write_volatile(bit_address as *mut _, 0x00); +} + +/// Reads a single bit at the given address without affecting other +/// bits in that memory location. +#[inline] +pub unsafe fn read_bit(address: *const T, bit: u8) -> T { + let address = address as usize; + let bit_address = bitband_alias_of(address, bit); + read_volatile(bit_address as *const _) +} + +/// Calculate the address in the bitband region of the given bit +#[inline] +fn bitband_alias_of(address: usize, bit: u8) -> usize { + // Only bits 0-31 are valid + assert!(bit < 32); + + let region_base = address & REGION_MASK; + // Ensure the address falls in a bit-band region + assert!((region_base == SRAM_BASE && address < SRAM_LIMIT) || + (region_base == PERIPHERAL_BASE && address < PERIPHERAL_LIMIT)); + + let bit_number = bit as usize; + let bit_band_base = region_base + ALIAS_OFFSET; + + let byte_offset = address & WORD_MASK; + let bit_word_offset = (byte_offset * 32) + (bit_number * 4); + let bit_word_addr = bit_band_base + bit_word_offset; + + bit_word_addr +} diff --git a/src/cs.rs b/src/cs.rs index 3b2c2a3..6178391 100644 --- a/src/cs.rs +++ b/src/cs.rs @@ -42,6 +42,7 @@ impl CsExt for CS { +--------+-----------------------+---------------+-------------------------------------+ */ +/// The CS peripheral, constrained. pub struct Cs { } diff --git a/src/gpio.rs b/src/gpio.rs index c76bf3e..468ddf8 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -1,22 +1,628 @@ -//! General Purpose Input / Output +//! # Digital Input / Output +//! +//! ## Hardware Summary: +//! +//! + Devices may have up to 11 I/O ports, most of which have 8 I/O lines. +//! + Each I/O line can be configured to the input or output direction +//! + Each I/O line can be individually read or written +//! + Each I/O line can be individually configured for a pull-up/down resistor +//! + Individual ports can be accessed byte-wise +//! + Ports are also arranged in pairs; e.g. P1 and P2 together are PA +//! + Port pairs can be accessed half-word-wise (16-bits at a time) +//! +//! ## API: +//! +//! With the `DIOExt` trait, you can consume the PAC-provided `DIO` and get back +//! a `Parts` struct that breaks out individual pins. Each pin struct is +//! parameterized by two typestate variables, one that describes the current I/O +//! configuration (e.g. input w/pull up, output w/regular drive) and one that +//! describes the current mode (e.g. GPIO, Primary peripheral). +//! +//! Depending on the current typestate, methods are available to transition to +//! available states from the current one via methods that have names beginning +//! with `into_`. Invalid transitions are not available. +//! +//! The `embedded_hal` trait `OutputPin` is provided for pins in `Gpio` mode +//! with an output configuration. Additional methods for interacting with the +//! hardware in ways not covered by HAL traits are provided in typestates where +//! they are appropriate. use pac::DIO; use core::marker::PhantomData; -use hal::digital::OutputPin; -pub trait GpioExt { - type Parts; +/// Extension trait to manage Digital I/O resources +pub trait DIOExt { - /// Consume and split the device into its constituent parts - fn split(self) -> Self::Parts; + /// Consume and split the DIO device into individual pin proxies + fn split(self) -> Parts; } +// +// Input Pin Pull typestate +// + +/// Types implementing this marker trait are typestate parameters to Input pins +/// that determine the pull up/down resistor configuration. +pub trait Pull {} + +/// An input of this type is internally floating; it has no pull up/down resistor. +pub struct NoPull; +impl Pull for NoPull {} + +/// An input of this type is configured with an internal pull-up resistor. +pub struct PullUp; +impl Pull for PullUp {} + +/// An input of this type is configured with an internal pull-down resistor. +pub struct PullDown; +impl Pull for PullDown {} + +// +// Output Pin Drive Strength typestate +// + +/// Types implementing this marker trait are typestate parameters to Output pins +/// that determine the drive strength of the pin +pub trait Drive {} + +/// An output of this type is configured for standard drive strength. +pub struct Regular; +impl Drive for Regular {} + +/// An output of this type is configured for strong drive strength. +pub struct Strong; +impl Drive for Strong {} + +// +// I/O Pin Mode typestate +// + +/// Types implementing this marker trait are typestate parameters to Input and +/// Output pins that determine which I/O function they are configured for +pub trait Mode {} + +/// This type represents a pin configured as a general purpose I/O pin. +pub struct Gpio; +impl Mode for Gpio {} + +/// This type represents a pin configured to serve its primary peripheral. +pub struct Primary; +impl Mode for Primary {} + +/// This type represents a pin configured to serve its secondary peripheral. +pub struct Secondary; +impl Mode for Secondary {} + +/// This type represents a pin configured to serve its tertiary peripheral. +pub struct Tertiary; +impl Mode for Tertiary {} + +// +// I/O Pin Config typestate +// + +/// Types implementing this marker trait are typestate parameters to DIO pins +/// that determine which operations are valid for their configuration +pub trait PinConfig {} + /// Represents a pin configured for input. -pub struct Input { - _mode: PhantomData, +pub struct Input { + _pull: PhantomData

, } +impl PinConfig for Input

{} /// Represents a pin configured for output. -pub struct Output { - _mode: PhantomData, +pub struct Output { + _drive: PhantomData, } +impl PinConfig for Output {} + + + +// +// Temp manual stuff, to replace with a macro +// + +macro_rules! gpio { + ([$($PX_i:ident : ($px_i:ident, $i:expr, $px_in:ident, $px_out:ident, $px_dir:ident, $px_ren:ident, $px_ds:ident, $px_sel0:ident, $px_sel1:ident, $px_selc:ident),)+]) => { + /// Individual types for each I/O pin. + /// + /// These types are parameterized over phantom types that represent the + /// state of the pins, but the pin types themselves are zero-sized. + /// Methods are provided to transition between states and to perform I/O + /// operations. + pub mod pins { + use hal::digital::OutputPin; + use core::marker::PhantomData; + use crate::bitband; + use super::*; + + $( + /// The type of an individual pin, parameterized by its state + /// and mode. + pub struct $PX_i { + _config: PhantomData, + _mode: PhantomData, + } + + impl Default for $PX_i { + fn default() -> $PX_i { + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + // Functions specific to Input pins + impl $PX_i, M> { + /// Consume the input pin, returning the same pin configured + /// as an output pin in the same mode. It will have regular + /// drive strength. + pub fn into_output(self) -> $PX_i, M> { + self.regular_drive_strength(); + self.output(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + /// Consume the input pin, returning the same pin configured + /// as an output pin in the same mode. It will have strong + /// drive strength if the physical pin supports it. + pub fn into_strong_output(self) -> $PX_i, M> { + self.strong_drive_strength(); + self.output(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i, M> { + /// Consume the floating input pin, returning the same pin + /// configured as an input with pull-up resistor. + pub fn into_pullup(self) -> $PX_i, M> { + self.pull_up(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + /// Consume the floating input pin, returning the same pin + /// configured as an input with pull-down resistor. + pub fn into_pulldown(self) -> $PX_i, M> { + self.pull_down(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i, M> { + /// Consume the input pin with pull-up resistor, returning + /// the same pin configured as a floating input (no pull-up/ + /// down resistor). + pub fn into_floating(self) -> $PX_i, M> { + self.pull_up(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + /// Consume the input pin with pull-up resistor, returning + /// the same pin configured as an input with pull-down + /// resistor. + pub fn into_pulldown(self) -> $PX_i, M> { + self.pull_down(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i, M> { + /// Consume the input pin with pull-down resistor, returning + /// the same pin configured as an input with pull-up resistor. + pub fn into_pullup(self) -> $PX_i, M> { + self.pull_up(); + $PX_i {_config: PhantomData, _mode: PhantomData } + } + /// Consume the input pin with pull-down resistor, returning + /// the same pin configured as a floating input (no pull-up/ + /// down resistor). + pub fn into_floating(self) -> $PX_i, M> { + self.pull_down(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + // Functions specific to Input pins in Gpio mode + impl $PX_i, Gpio> { + /// Read the state of the pin. + /// + /// If the pin is in a logic-high state, this returns 1; + /// if the pin is in a logic-low state, this returns 0. + pub fn read_pin(&self) -> u16 { + let dio = unsafe { &*DIO::ptr() }; + let din = &dio.$px_in as *const _ as *const u16; + unsafe { + bitband::read_bit(din, $i) + } + } + } + + // Functions specific to Output pins + impl $PX_i, M> { + /// Consume the output pin, returning the same pin + /// configured as a floating input (no pull-up/down + /// resistor). + pub fn into_floating_input(self) -> $PX_i, M> { + self.floating(); + self.input(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Consume the output pin, returning the same pin + /// configured as an input with pull-up resistor. + pub fn into_input_with_pullup(self) -> $PX_i, M> { + self.pull_up(); + self.input(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Consume the output pin, returning the same pin + /// configured as an input with pull-down resistor. + pub fn into_input_with_pulldown(self) -> $PX_i, M> { + self.pull_down(); + self.input(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i, M> { + /// Consume the output pin of regular drive strength, + /// returning the same pin configured to strong drive + /// strength. + pub fn into_strong(self) -> $PX_i, M> { + self.strong_drive_strength(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i, M> { + /// Consume the output pin of strong drive strength, + /// returning the same pin configured to regular drive + /// strength. + pub fn into_regular(self) -> $PX_i, M> { + self.regular_drive_strength(); + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + + // Functions specific to Output pins in Gpio mode + impl OutputPin for $PX_i, Gpio> { + fn set_high(&mut self) { + let dio = unsafe { &*DIO::ptr() }; + let dout = &dio.$px_out as *const _ as *const u16; + unsafe { + bitband::set_bit(dout, $i); + } + } + + fn set_low(&mut self) { + let dio = unsafe { &*DIO::ptr() }; + let dout = &dio.$px_out as *const _ as *const u16; + unsafe { + bitband::clear_bit(dout, $i); + } + } + } + + // Mode changing functions + // + // SEL1 SEL0 + // Gpio 0 0 + // Primary 0 1 + // Secondary 1 0 + // Tertiary 1 1 + // + // Setting SELC toggles both SEL1 and SEL0 + // + impl $PX_i { + /// Change the pin mode from Gpio mode to the Primary + /// peripheral mode. + pub fn into_primary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel0 = &dio.$px_sel0 as *const _ as *const u16; + unsafe { + bitband::set_bit(sel0, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Gpio mode into the Secondary + /// peripheral mode. + pub fn into_secondary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel1 = &dio.$px_sel1 as *const _ as *const u16; + unsafe { + bitband::set_bit(sel1, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Gpio mode into the Tertiary + /// peripheral mode. + pub fn into_tertiary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let selc = &dio.$px_selc as *const _ as *const u16; + unsafe { + bitband::set_bit(selc, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i { + /// Change the pin mode from Primary peripheral mode into + /// the Gpio mode. + pub fn into_gpio(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel0 = &dio.$px_sel0 as *const _ as *const u16; + unsafe { + bitband::clear_bit(sel0, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Primary peripheral mode into + /// the Secondary peripheral mode. + pub fn into_secondary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let selc = &dio.$px_selc as *const _ as *const u16; + unsafe { + bitband::set_bit(selc, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Primary peripheral mode into + /// the Tertiary peripheral mode. + pub fn into_tertiary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel1 = &dio.$px_sel1 as *const _ as *const u16; + unsafe { + bitband::set_bit(sel1, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i { + /// Change the pin mode from Secondary peripheral mode into + /// into the Primary peripheral mode. + pub fn into_primary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let selc = &dio.$px_selc as *const _ as *const u16; + unsafe { + bitband::set_bit(selc, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Secondary peripheral mode into + /// the Gpio mode. + pub fn into_gpio(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel1 = &dio.$px_sel1 as *const _ as *const u16; + unsafe { + bitband::clear_bit(sel1, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Secondary peripheral mode into + /// the Tertiary peripheral mode. + pub fn into_tertiary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel0 = &dio.$px_sel0 as *const _ as *const u16; + unsafe { + bitband::set_bit(sel0, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + impl $PX_i { + /// Change the pin mode from Tertiary peripheral mode into + /// the Primary peripheral mode. + pub fn into_primary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel1 = &dio.$px_sel1 as *const _ as *const u16; + unsafe { + bitband::clear_bit(sel1, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Tertiary peripheral mode into + /// the Secondary peripheral mode. + pub fn into_secondary(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let sel0 = &dio.$px_sel0 as *const _ as *const u16; + unsafe { + bitband::clear_bit(sel0, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + + /// Change the pin mode from Tertiary peripheral mode into + /// the Gpio mode. + pub fn into_gpio(self) -> $PX_i { + let dio = unsafe { &*DIO::ptr() }; + let selc = &dio.$px_selc as *const _ as *const u16; + unsafe { + bitband::set_bit(selc, $i); + } + $PX_i { _config: PhantomData, _mode: PhantomData } + } + } + + + // Private and all-pin functions + impl $PX_i { + fn output(&self) { + let dio = unsafe { &*DIO::ptr() }; + let dir = &dio.padir as *const _ as *const u16; + unsafe { + bitband::set_bit(dir, $i); + } + } + fn input(&self) { + let dio = unsafe { &*DIO::ptr() }; + let dir = &dio.padir as *const _ as *const u16; + unsafe { + bitband::clear_bit(dir, $i); + } + } + fn strong_drive_strength(&self) { + let dio = unsafe { &*DIO::ptr() }; + let ds = &dio.$px_ds as *const _ as *const u16; + unsafe { + bitband::set_bit(ds, $i); + } + } + fn regular_drive_strength(&self) { + let dio = unsafe { &*DIO::ptr() }; + let ds = &dio.$px_ds as *const _ as *const u16; + unsafe { + bitband::clear_bit(ds, $i); + } + } + fn pull_up(&self) { + let dio = unsafe { &*DIO::ptr() }; + let ren = &dio.$px_ren as *const _ as *const u16; + let out = &dio.$px_out as *const _ as *const u16; + unsafe { + bitband::set_bit(out, $i); + bitband::set_bit(ren, $i); + } + } + fn pull_down(&self) { + let dio = unsafe { &*DIO::ptr() }; + let ren = &dio.$px_ren as *const _ as *const u16; + let out = &dio.$px_out as *const _ as *const u16; + unsafe { + bitband::clear_bit(out, $i); + bitband::set_bit(ren, $i); + } + } + fn floating(&self) { + let dio = unsafe { &*DIO::ptr() }; + let ren = &dio.$px_ren as *const _ as *const u16; + let out = &dio.$px_out as *const _ as *const u16; + unsafe { + bitband::clear_bit(out, $i); + bitband::clear_bit(ren, $i); + } + } + } + )+ + } + + /// The DIO peripheral split into individual pins. + pub struct Parts { + $( + /// One of the DIO pins. It defaults to a floating input in Gpio mode. + pub $px_i: pins::$PX_i, Gpio>, + )+ + } + + impl DIOExt for DIO { + fn split(self) -> Parts { + Parts { + $( + $px_i: Default::default(), + )+ + } + } + } + } +} + +gpio!([ + P1_0: (p1_0, 0, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_1: (p1_1, 1, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_2: (p1_2, 2, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_3: (p1_3, 3, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_4: (p1_4, 4, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_5: (p1_5, 5, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_6: (p1_6, 6, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P1_7: (p1_7, 7, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + + P2_0: (p2_0, 8, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_1: (p2_1, 9, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_2: (p2_2, 10, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_3: (p2_3, 11, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_4: (p2_4, 12, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_5: (p2_5, 13, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_6: (p2_6, 14, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + P2_7: (p2_7, 15, pain, paout, padir, paren, pads, pasel0, pasel1, paselc), + + P3_0: (p3_0, 0, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_1: (p3_1, 1, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_2: (p3_2, 2, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_3: (p3_3, 3, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_4: (p3_4, 4, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_5: (p3_5, 5, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_6: (p3_6, 6, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P3_7: (p3_7, 7, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + + P4_0: (p4_0, 8, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_1: (p4_1, 9, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_2: (p4_2, 10, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_3: (p4_3, 11, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_4: (p4_4, 12, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_5: (p4_5, 13, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_6: (p4_6, 14, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + P4_7: (p4_7, 15, pbin, pbout, pbdir, pbren, pbds, pbsel0, pbsel1, pbselc), + + P5_0: (p5_0, 0, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_1: (p5_1, 1, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_2: (p5_2, 2, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_3: (p5_3, 3, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_4: (p5_4, 4, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_5: (p5_5, 5, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_6: (p5_6, 6, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P5_7: (p5_7, 7, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + + P6_0: (p6_0, 8, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_1: (p6_1, 9, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_2: (p6_2, 10, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_3: (p6_3, 11, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_4: (p6_4, 12, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_5: (p6_5, 13, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_6: (p6_6, 14, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + P6_7: (p6_7, 15, pcin, pcout, pcdir, pcren, pcds, pcsel0, pcsel1, pcselc), + + P7_0: (p7_0, 0, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_1: (p7_1, 1, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_2: (p7_2, 2, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_3: (p7_3, 3, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_4: (p7_4, 4, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_5: (p7_5, 5, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_6: (p7_6, 6, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P7_7: (p7_7, 7, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + + P8_0: (p8_0, 8, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_1: (p8_1, 9, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_2: (p8_2, 10, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_3: (p8_3, 11, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_4: (p8_4, 12, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_5: (p8_5, 13, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_6: (p8_6, 14, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + P8_7: (p8_7, 15, pdin, pdout, pddir, pdren, pdds, pdsel0, pdsel1, pdselc), + + P9_0: (p9_0, 0, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_1: (p9_1, 1, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_2: (p9_2, 2, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_3: (p9_3, 3, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_4: (p9_4, 4, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_5: (p9_5, 5, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_6: (p9_6, 6, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P9_7: (p9_7, 7, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + + P10_0: (p10_0, 8, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_1: (p10_1, 9, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_2: (p10_2, 10, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_3: (p10_3, 11, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_4: (p10_4, 12, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_5: (p10_5, 13, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_6: (p10_6, 14, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + P10_7: (p10_7, 15, pein, peout, pedir, peren, peds, pesel0, pesel1, peselc), + +]); diff --git a/src/lib.rs b/src/lib.rs index 9cfa8f7..3e2123d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -20,6 +20,7 @@ extern crate embedded_hal as hal; extern crate msp432p401r as pac; pub mod prelude; +pub mod bitband; pub mod gpio; pub mod delay; pub mod cs; diff --git a/src/prelude.rs b/src/prelude.rs index 5b13046..a1f7b9b 100644 --- a/src/prelude.rs +++ b/src/prelude.rs @@ -1,3 +1,6 @@ //! Prelude +pub use crate::cs::CsExt as _msp432_hal_cs_CsExt; +pub use crate::gpio::DIOExt as _msp432_hal_gpio_DIOExt; pub use hal::prelude::*; +pub use crate::time::U32Ext as _msp432_hal_time_U32Ext;