Port the blinking w/RTT output code to RTIC framework

master
Levi Pearson 2020-07-09 02:11:27 -06:00
parent 0291bf41d2
commit fe4af2ae6e
4 changed files with 118 additions and 53 deletions

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@ -1,6 +1,5 @@
target remote :3333 target remote :3333
monitor arm semihosting enable
load load
step step

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@ -1,5 +1,5 @@
[package] [package]
name = "blue_pill_base" name = "blue_pill_rtic"
version = "0.1.0" version = "0.1.0"
authors = ["Levi Pearson <levipearson@gmail.com>"] authors = ["Levi Pearson <levipearson@gmail.com>"]
description = "Base binary crate for STM32F103 Blue Pill boards" description = "Base binary crate for STM32F103 Blue Pill boards"
@ -11,15 +11,17 @@ cortex-m = "0.6.2"
cortex-m-rt = "0.6.12" cortex-m-rt = "0.6.12"
#cortex-m-semihosting = "0.3.5" #cortex-m-semihosting = "0.3.5"
# alternate panic impls, choose only one! # alternate panic impls, choose only one!
panic-halt = "0.2.0" #panic-halt = "0.2.0"
#panic-semihosting = "0.5.3" # requires cortex-m-semihosting #panic-semihosting = "0.5.3" # requires cortex-m-semihosting
#panic-itm = "0.4.1" #panic-itm = "0.4.1"
#panic-abort = "0.3.2" #panic-abort = "0.3.2"
#panic-ramdump = "0.1.1" #panic-ramdump = "0.1.1"
#panic-persist = "0.2.1" #panic-persist = "0.2.1"
panic-rtt-target = { version = "0.1.0", features = ["cortex-m"] }
embedded-hal = "0.2.3" embedded-hal = "0.2.3"
nb = "0.1.2" nb = "0.1.2"
rtt-target = { version = "0.2.0", features = ["cortex-m"] } rtt-target = { version = "0.2.0", features = ["cortex-m"] }
cortex-m-rtic = "0.5.0"
[dependencies.stm32f1] [dependencies.stm32f1]
version = "0.10.0" version = "0.10.0"
@ -30,7 +32,7 @@ version = "0.5.3"
features = ["rt", "stm32f103", "medium"] features = ["rt", "stm32f103", "medium"]
[[bin]] [[bin]]
name = "blue_pill_base" name = "blue_pill_rtic"
test = false test = false
bench = false bench = false

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@ -1,5 +1,8 @@
# Sample OpenOCD configuration for the blue pill board # Sample OpenOCD configuration for the blue pill board
# Some microcontrollers have a different CPU ID; uncomment this if yours is one
set CPUTAPID 0x2ba01477
# Depending on the hardware revision you got you'll have to pick ONE of these # Depending on the hardware revision you got you'll have to pick ONE of these
# interfaces. At any time only one interface should be commented out. # interfaces. At any time only one interface should be commented out.

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@ -9,66 +9,127 @@
#![no_std] #![no_std]
#![no_main] #![no_main]
//use panic_halt as _;
use core::panic::PanicInfo;
use rtt_target::{rprintln, rtt_init_print}; use rtt_target::{rprintln, rtt_init_print};
use panic_rtt_target as _;
use nb::block;
use stm32f1xx_hal::{ use stm32f1xx_hal::{
prelude::*, prelude::*,
pac, stm32,
timer::Timer, timer::{Timer, Event},
}; };
use cortex_m_rt::entry; use core::sync::atomic::{self, Ordering};
use embedded_hal::digital::v2::OutputPin;
#[entry] use stm32f1xx_hal as hal;
fn main() -> ! {
// Init buffers for debug printing #[rtic::app(device = stm32f1xx_hal::stm32, peripherals = true)]
const APP: () = {
// Defining this struct makes shared resources available to tasks; if
// they can't be statically initialized, they will be initialized by
// the values returned from `init`
struct Resources {
// resources -- these are statically initialized via `init` attributes
#[init(0)]
beat: u8,
// late resources -- these must be initialized in the `init` task and
// returned in `init::LateResources`
led1: hal::gpio::gpioc::PC13<hal::gpio::Output<hal::gpio::PushPull>>,
tmr2: hal::timer::CountDownTimer<stm32::TIM2>,
tmr3: hal::timer::CountDownTimer<stm32::TIM3>,
}
// This task does startup config; the peripherals are passed in thanks to
// `peripherals = true` in the app definition. They are the `device` and
// `core` fields of `init::Context`.
// Any dynamically-configured shared resources in `Resources` must be
// returned as part of `init::LateResources`.
#[init]
fn init(cx: init::Context) -> init::LateResources {
rtt_init_print!(); rtt_init_print!();
// Get access to the core peripherals from the cortex-m crate rprintln!("init begin");
let cp = cortex_m::Peripherals::take().unwrap();
// Get access to the device specific peripherals from the peripheral access crate
let dp = pac::Peripherals::take().unwrap();
// Take ownership over the raw flash and rcc devices and convert them into the corresponding // Set everything to 8MHz using the external clock
// HAL structs let mut flash = cx.device.FLASH.constrain();
let mut flash = dp.FLASH.constrain(); let mut rcc = cx.device.RCC.constrain();
let mut rcc = dp.RCC.constrain(); let clocks = rcc
.cfgr
.use_hse(8.mhz())
.sysclk(8.mhz())
.hclk(8.mhz())
.pclk1(8.mhz())
.pclk2(8.mhz())
.adcclk(8.mhz())
.freeze(&mut flash.acr);
// Freeze the configuration of all the clocks in the system and store the frozen frequencies in // LED is on pin C13, configure it for output
// `clocks` let mut gpioc = cx.device.GPIOC.split(&mut rcc.apb2);
let clocks = rcc.cfgr.freeze(&mut flash.acr); let led1 = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
// Acquire the GPIOC peripheral // Use TIM2 for the beat counter task
let mut gpioc = dp.GPIOC.split(&mut rcc.apb2); let mut tmr2 = Timer::tim2(cx.device.TIM2, &clocks, &mut rcc.apb1)
.start_count_down(1.hz());
tmr2.listen(Event::Update);
// Configure gpio C pin 13 as a push-pull output. The `crh` register is passed to the function // Use TIM3 for the LED blinker task
// in order to configure the port. For pins 0-7, crl should be passed instead. let mut tmr3 = Timer::tim3(cx.device.TIM3, &clocks, &mut rcc.apb1)
let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh); .start_count_down(2.hz());
// Configure the syst timer to trigger an update every second tmr3.listen(Event::Update);
let mut timer = Timer::syst(cp.SYST, &clocks).start_count_down(1.hz());
rprintln!("Hello, Rust!"); rprintln!("init end");
// Wait for the timer to trigger an update and change the state of the LED
let mut i = 0; init::LateResources {
led1,
tmr2,
tmr3,
}
}
#[idle]
fn idle(_: idle::Context) -> ! {
loop { loop {
block!(timer.wait()).unwrap(); // The compiler may omit this loop without the following
led.set_high().unwrap(); atomic::compiler_fence(Ordering::SeqCst);
block!(timer.wait()).unwrap();
led.set_low().unwrap();
i += 1;
rprintln!("Hello again; I have blinked {} times.", i);
if i == 10 {
panic!("Yow, 10 times is enough!");
} }
} }
}
#[inline(never)] // Update the beat counter and periodically display the current count
#[panic_handler] // on the RTT channel
fn panic(info: &PanicInfo) -> ! { #[task(resources = [beat])]
rprintln!("{}", info); fn beat_update(cx: beat_update::Context) {
loop {} // You might need a compiler fence in here. if *cx.resources.beat % 10 == 0 {
} rprintln!("TIM2 beat = {}", *cx.resources.beat);
}
*cx.resources.beat += 1;
}
// Interrupt task for TIM2, the beat counter timer
#[task(binds = TIM2, priority = 2, resources = [tmr2], spawn = [beat_update])]
fn tim2(cx: tim2::Context) {
// Delegate the state update to a software task
cx.spawn.beat_update().unwrap();
// Restart the timer and clear the interrupt flag
cx.resources.tmr2.start(1.hz());
cx.resources.tmr2.clear_update_interrupt_flag();
}
// Interrupt task for TIM3, the LED blink timer
#[task(binds = TIM3, priority = 1, resources = [led1, tmr3])]
fn tim3(cx: tim3::Context) {
cx.resources.led1.toggle().unwrap();
cx.resources.tmr3.start(2.hz());
cx.resources.tmr3.clear_update_interrupt_flag();
}
// RTIC requires that unused interrupts are declared in an extern block when
// using software tasks; these free interrupts will be used to dispatch the
// software tasks.
//
// For a list, see:
// https://docs.rs/stm32f1xx-hal/0.6.1/stm32f1xx_hal/stm32/enum.Interrupt.html
extern "C" {
fn TAMPER();
}
};