From 3df764e74c48dd9ac416f7845136a1d8085592bf Mon Sep 17 00:00:00 2001
From: Levi Pearson <levipearson@gmail.com>
Date: Wed, 9 Mar 2022 03:40:15 -0700
Subject: [PATCH] Update hal to 0.9.0

---
 Cargo.toml  |  2 +-
 src/main.rs | 17 ++++++++---------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/Cargo.toml b/Cargo.toml
index a293beb..1b1ca35 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -10,7 +10,7 @@ edition = "2021"
 cortex-m = "0.7.4"
 cortex-m-rt = "0.7.1"
 embedded-hal = "0.2.3"
-stm32f1xx-hal = { version = "0.8.0", features = ["rt", "stm32f103", "medium"] }
+stm32f1xx-hal = { version = "0.9.0", features = ["rt", "stm32f103", "medium"] }
 rtt-target = { version = "0.3.1", features = ["cortex-m"] }
 panic-rtt-target = { version = "0.1.0", features = ["cortex-m"] }
 switch-hal = "0.4.0"
diff --git a/src/main.rs b/src/main.rs
index 626d70b..781629c 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -10,7 +10,6 @@ use cortex_m::interrupt::Mutex;
 
 use stm32f1xx_hal::{
     afio,
-    delay::Delay,
     device::{EXTI, NVIC},
     gpio::{
         gpioa::{PA8, PA9},
@@ -64,17 +63,17 @@ fn main() -> ! {
     // we configure the clock and "freeze" the configuration so we can pass it
     let clocks = rcc
         .cfgr
-        .use_hse(8.mhz()) // Use High Speed External 8Mhz crystal oscillator
-        .sysclk(72.mhz()) // Use the PLL to multiply SYSCLK to 72MHz
-        .hclk(72.mhz()) // Leave AHB prescaler at /1
-        .pclk1(36.mhz()) // Use the APB1 prescaler to divide the clock to 36MHz (max supported)
-        .pclk2(72.mhz()) // Leave the APB2 prescaler at /1
-        .adcclk(12.mhz()) // ADC prescaler of /6 (max speed of 14MHz, but /4 gives 18MHz)
+        .use_hse(8.MHz()) // Use High Speed External 8Mhz crystal oscillator
+        .sysclk(72.MHz()) // Use the PLL to multiply SYSCLK to 72MHz
+        .hclk(72.MHz()) // Leave AHB prescaler at /1
+        .pclk1(36.MHz()) // Use the APB1 prescaler to divide the clock to 36MHz (max supported)
+        .pclk2(72.MHz()) // Leave the APB2 prescaler at /1
+        .adcclk(12.MHz()) // ADC prescaler of /6 (max speed of 14MHz, but /4 gives 18MHz)
         .freeze(&mut flash.acr);
 
     // In order to have precisely-timed delays, we can use the core SysTick clock as a
     // delay provider
-    let mut delay = Delay::new(core_periph.SYST, clocks);
+    let mut delay = core_periph.SYST.delay(&clocks);
 
     // Acquire the necessary gpio peripherals
     let mut gpioa = dev_periph.GPIOA.split();
@@ -111,7 +110,7 @@ fn main() -> ! {
         dev_periph.I2C2,
         (scl, sda),
         Mode::Fast {
-            frequency: 400_000.hz(),
+            frequency: 400_000.Hz(),
             duty_cycle: DutyCycle::Ratio2to1,
         },
         clocks,